diff options
author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-12-06 09:59:12 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-12-06 09:59:12 +0000 |
commit | 9f9758935af0a6d9ca513d14412c5e6a2a8032d5 (patch) | |
tree | 304e2e10c27189fff0ea6aafcc8a95fba81f9f9a /lib/Target/SystemZ | |
parent | 8bf51dc72bffd9a2e2fcc3d3e0215c859eb1d60f (diff) |
[SystemZ] Use LOAD AND TEST for comparisons with -0
...since it os equivalent to comparison with +0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196580 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ')
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrFP.td | 6 | ||||
-rw-r--r-- | lib/Target/SystemZ/SystemZPatterns.td | 7 |
2 files changed, 8 insertions, 5 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td index 60800460fca..07f253d8cdc 100644 --- a/lib/Target/SystemZ/SystemZInstrFP.td +++ b/lib/Target/SystemZ/SystemZInstrFP.td @@ -46,9 +46,9 @@ let Defs = [CC], CCValues = 0xF, CompareZeroCCMask = 0xF in { defm LTDBR : LoadAndTestRRE<"ltdb", 0xB312, FP64>; defm LTXBR : LoadAndTestRRE<"ltxb", 0xB342, FP128>; } -def : CompareZeroFP<LTEBRCompare, FP32>; -def : CompareZeroFP<LTDBRCompare, FP64>; -def : CompareZeroFP<LTXBRCompare, FP128>; +defm : CompareZeroFP<LTEBRCompare, FP32>; +defm : CompareZeroFP<LTDBRCompare, FP64>; +defm : CompareZeroFP<LTXBRCompare, FP128>; // Moves between 64-bit integer and floating-point registers. def LGDR : UnaryRRE<"lgd", 0xB3CD, bitconvert, GR64, FP64>; diff --git a/lib/Target/SystemZ/SystemZPatterns.td b/lib/Target/SystemZ/SystemZPatterns.td index 7706351e54b..c0f94ecbe2c 100644 --- a/lib/Target/SystemZ/SystemZPatterns.td +++ b/lib/Target/SystemZ/SystemZPatterns.td @@ -148,5 +148,8 @@ multiclass BlockLoadStore<SDPatternOperator load, ValueType vt, // Record that INSN is a LOAD AND TEST that can be used to compare // registers in CLS against zero. The instruction has separate R1 and R2 // operands, but they must be the same when the instruction is used like this. -class CompareZeroFP<Instruction insn, RegisterOperand cls> - : Pat<(z_fcmp cls:$reg, (fpimm0)), (insn cls:$reg, cls:$reg)>; +multiclass CompareZeroFP<Instruction insn, RegisterOperand cls> { + def : Pat<(z_fcmp cls:$reg, (fpimm0)), (insn cls:$reg, cls:$reg)>; + // The sign of the zero makes no difference. + def : Pat<(z_fcmp cls:$reg, (fpimmneg0)), (insn cls:$reg, cls:$reg)>; +} |