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author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-20 15:02:24 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-20 15:02:24 +0000 |
commit | 0bbfc9313c2b6fc63ae19174858bbaab1c774661 (patch) | |
tree | e761697a128e5c31e191cdbc0b927cd3f963186e /lib/Target/R600 | |
parent | ba534c21437ba133cb9d6b3f9dae80fa9c4f0cb7 (diff) |
R600/SI: Add pattern for rotr
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182286 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600')
-rw-r--r-- | lib/Target/R600/SIInstructions.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index f557922c2c5..7c725ccec48 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -964,6 +964,8 @@ def V_FMA_F32 : VOP3_32 <0x0000014b, "V_FMA_F32", []>; def V_FMA_F64 : VOP3_64 <0x0000014c, "V_FMA_F64", []>; //def V_LERP_U8 : VOP3_U8 <0x0000014d, "V_LERP_U8", []>; def V_ALIGNBIT_B32 : VOP3_32 <0x0000014e, "V_ALIGNBIT_B32", []>; +def : ROTRPattern <V_ALIGNBIT_B32>; + def V_ALIGNBYTE_B32 : VOP3_32 <0x0000014f, "V_ALIGNBYTE_B32", []>; def V_MULLIT_F32 : VOP3_32 <0x00000150, "V_MULLIT_F32", []>; ////def V_MIN3_F32 : VOP3_MIN3 <0x00000151, "V_MIN3_F32", []>; |