diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-16 22:35:46 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-16 22:35:46 +0000 |
commit | 78e6e009223a38739797629ca2d217acf86dda93 (patch) | |
tree | 75935c3cf8e6533ddac2b69d9f406335d165d772 /lib/Target/Mips | |
parent | 2aaa98da767ffd07e773a228bcae4adf65c49bc5 (diff) |
Remove the isMoveInstr() hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 47 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 6 |
2 files changed, 0 insertions, 53 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 6c09a3e1078..aaf307b1ce3 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -30,53 +30,6 @@ static bool isZeroImm(const MachineOperand &op) { return op.isImm() && op.getImm() == 0; } -/// Return true if the instruction is a register to register move and -/// leave the source and dest operands in the passed parameters. -bool MipsInstrInfo:: -isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, - unsigned &SrcSubIdx, unsigned &DstSubIdx) const -{ - SrcSubIdx = DstSubIdx = 0; // No sub-registers. - - // addu $dst, $src, $zero || addu $dst, $zero, $src - // or $dst, $src, $zero || or $dst, $zero, $src - if ((MI.getOpcode() == Mips::ADDu) || (MI.getOpcode() == Mips::OR)) { - if (MI.getOperand(1).getReg() == Mips::ZERO) { - DstReg = MI.getOperand(0).getReg(); - SrcReg = MI.getOperand(2).getReg(); - return true; - } else if (MI.getOperand(2).getReg() == Mips::ZERO) { - DstReg = MI.getOperand(0).getReg(); - SrcReg = MI.getOperand(1).getReg(); - return true; - } - } - - // mov $fpDst, $fpSrc - // mfc $gpDst, $fpSrc - // mtc $fpDst, $gpSrc - if (MI.getOpcode() == Mips::FMOV_S32 || - MI.getOpcode() == Mips::FMOV_D32 || - MI.getOpcode() == Mips::MFC1 || - MI.getOpcode() == Mips::MTC1 || - MI.getOpcode() == Mips::MOVCCRToCCR) { - DstReg = MI.getOperand(0).getReg(); - SrcReg = MI.getOperand(1).getReg(); - return true; - } - - // addiu $dst, $src, 0 - if (MI.getOpcode() == Mips::ADDiu) { - if ((MI.getOperand(1).isReg()) && (isZeroImm(MI.getOperand(2)))) { - DstReg = MI.getOperand(0).getReg(); - SrcReg = MI.getOperand(1).getReg(); - return true; - } - } - - return false; -} - /// isLoadFromStackSlot - If the specified machine instruction is a direct /// load from a stack slot, return the virtual or physical register number of /// the destination along with the FrameIndex of the loaded stack slot. If diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index d6f87f9b0ce..52a3d39840b 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -174,12 +174,6 @@ public: /// virtual const MipsRegisterInfo &getRegisterInfo() const { return RI; } - /// Return true if the instruction is a register to register move and return - /// the source and dest operands and their sub-register indices by reference. - virtual bool isMoveInstr(const MachineInstr &MI, - unsigned &SrcReg, unsigned &DstReg, - unsigned &SrcSubIdx, unsigned &DstSubIdx) const; - /// isLoadFromStackSlot - If the specified machine instruction is a direct /// load from a stack slot, return the virtual or physical register number of /// the destination along with the FrameIndex of the loaded stack slot. If |