diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 02:15:57 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-09-27 02:15:57 +0000 |
| commit | 01f7089bca51744226306e09db4954e3df02b3be (patch) | |
| tree | b393bb78e8c07f5454d917c464d7f422e5635598 /lib/Target/Mips/MipsDSPInstrFormats.td | |
| parent | 2df483efb3a3d99dd82eb88e13490ae464bf0e43 (diff) | |
MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsDSPInstrFormats.td')
| -rw-r--r-- | lib/Target/Mips/MipsDSPInstrFormats.td | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsDSPInstrFormats.td b/lib/Target/Mips/MipsDSPInstrFormats.td index 2a0bc2eaaef..c22bbdc2084 100644 --- a/lib/Target/Mips/MipsDSPInstrFormats.td +++ b/lib/Target/Mips/MipsDSPInstrFormats.td @@ -103,3 +103,13 @@ class SHILO_R2_FMT<bits<5> op> : DSPInst { let Inst{10-6} = op; let Inst{5-0} = 0b111000; } + +class BPOSGE32_FMT<bits<5> op> : DSPInst { + bits<16> offset; + + let Opcode = REGIMM_OPCODE.V; + + let Inst{25-21} = 0; + let Inst{20-16} = op; + let Inst{15-0} = offset; +} |