diff options
| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-15 10:27:19 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-15 10:27:19 +0000 |
| commit | fc4953bff2e5223a807d5740f6a98274f9346c67 (patch) | |
| tree | efdad068510bd6aefb0b190ef7c19d35c8f46eb1 /lib/Target/Mips/Mips32r6InstrInfo.td | |
| parent | ca323cf916fc7e2bb227e253c15d456f3f3ca3eb (diff) | |
[mips][mips64r6] Add aui, daui, dahi, and dati
Summary: Depends on D3671
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208857 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips32r6InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips32r6InstrInfo.td | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips32r6InstrInfo.td b/lib/Target/Mips/Mips32r6InstrInfo.td index f0f6df82b7a..769bb8add5e 100644 --- a/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/lib/Target/Mips/Mips32r6InstrInfo.td @@ -58,6 +58,7 @@ include "Mips32r6InstrFormats.td" // //===----------------------------------------------------------------------===// +class AUI_ENC : AUI_FM; class DIV_ENC : SPECIAL_3R_FM<0b00010, 0b011010>; class DIVU_ENC : SPECIAL_3R_FM<0b00010, 0b011011>; class MOD_ENC : SPECIAL_3R_FM<0b00011, 0b011010>; @@ -75,6 +76,15 @@ class SEL_S_ENC : COP1_3R_FM<0b010000, FIELD_FMT_S>; // //===----------------------------------------------------------------------===// +class AUI_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> { + dag OutOperandList = (outs GPROpnd:$rs); + dag InOperandList = (ins GPROpnd:$rt, simm16:$imm); + string AsmString = !strconcat(instr_asm, "\t$rs, $rt, $imm"); + list<dag> Pattern = []; +} + +class AUI_DESC : AUI_DESC_BASE<"aui", GPR32Opnd>; + class DIVMOD_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> { dag OutOperandList = (outs GPROpnd:$rd); dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt); @@ -119,7 +129,7 @@ class SEL_S_DESC : SEL_DESC_BASE<"sel.s", FGR32Opnd>; def ADDIUPC; def ALIGN; // Known as as BALIGN in DSP ASE def ALUIPC; -def AUI; +def AUI : AUI_ENC, AUI_DESC, ISA_MIPS32R6; def AUIPC; def BALC; def BC1EQZ; |