diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2012-09-10 14:04:46 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-09-21 16:41:33 +0000 |
| commit | b4af59187d642b7fd6d81c193d098d659d1ac2e8 (patch) | |
| tree | 3f5dc454e1f304e832ac6053a1843a02d02ce096 /lib/Target/AMDGPU/R600RegisterInfo.td | |
| parent | aa73abab4bcc07ff40d3ddcb7a466414abede606 (diff) | |
AMDGPU: Fix register names
Diffstat (limited to 'lib/Target/AMDGPU/R600RegisterInfo.td')
| -rw-r--r-- | lib/Target/AMDGPU/R600RegisterInfo.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/AMDGPU/R600RegisterInfo.td b/lib/Target/AMDGPU/R600RegisterInfo.td index e1ac4fcabe1..37345c603e2 100644 --- a/lib/Target/AMDGPU/R600RegisterInfo.td +++ b/lib/Target/AMDGPU/R600RegisterInfo.td @@ -14,14 +14,14 @@ class R600Reg_128<string n, list<Register> subregs, bits<16> encoding> : foreach Index = 0-127 in { foreach Chan = [ "X", "Y", "Z", "W" ] in { // 32-bit Temporary Registers - def T#Index#_#Chan : R600Reg <"T#Index#.#Chan", !cast<bits<16>>(Index)>; + def T#Index#_#Chan : R600Reg <"T"#Index#"."#Chan, !cast<bits<16>>(Index)>; // 32-bit Constant Registers (There are more than 128, this the number // that is currently supported. - def C#Index#_#Chan : R600Reg <"C#Index#.#Chan", !cast<bits<16>>(Index)>; + def C#Index#_#Chan : R600Reg <"C"#Index#"."#Chan, !cast<bits<16>>(Index)>; } // 128-bit Temporary Registers - def T#Index#_XYZW : R600Reg_128 <"T#Index#.XYZW", + def T#Index#_XYZW : R600Reg_128 <"T"#Index#".XYZW", [!cast<Register>("T"#Index#"_X"), !cast<Register>("T"#Index#"_Y"), !cast<Register>("T"#Index#"_Z"), |