diff options
| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-02 14:15:43 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-02 14:15:43 +0000 |
| commit | 3cfa231f802b9ea294c847ec893964a01fc601d6 (patch) | |
| tree | e92e0d913f1efe1d5f3a34418c19b8b06d64f2f6 /lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | |
| parent | 1c9dfadec14f5113e84f105ce0a4a1238b116965 (diff) | |
R600: Fix instruction encoding for r600 family GPUs
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
https://bugs.freedesktop.org/show_bug.cgi?id=55217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165012 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp index 274400aa34a..0ef0a9c2ad7 100644 --- a/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp @@ -216,8 +216,8 @@ void R600MCCodeEmitter::EmitALUInstr(const MCInst &MI, //older alu have different encoding for instructions with one or two src //parameters. - if (STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst && - MI.getNumOperands() < 4) { + if ((STI.getFeatureBits() & AMDGPU::FeatureR600ALUInst) && + !(MCDesc.TSFlags & R600_InstFlag::OP3)) { uint64_t ISAOpCode = InstWord01 & (0x3FFULL << 39); InstWord01 &= ~(0x3FFULL << 39); InstWord01 |= ISAOpCode << 1; |