Fold:

        // (X != 0) | (Y != 0) -> (X|Y != 0)
        // (X == 0) & (Y == 0) -> (X|Y == 0)

Compiling this:

int %bar(int %a, int %b) {
        entry:
        %tmp.1 = setne int %a, 0
        %tmp.2 = setne int %b, 0
        %tmp.3 = or bool %tmp.1, %tmp.2
        %retval = cast bool %tmp.3 to int
        ret int %retval
        }

to this:

_bar:
        or r2, r3, r4
        addic r3, r2, -1
        subfe r3, r3, r2
        blr

instead of:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r3, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21316 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 11 insertions, 0 deletions

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 02fe482a40a..3058ceafe27 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -933,6 +933,17 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
         SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
         ISD::CondCode Op2 = RHS->getCondition();
 
+        // (X != 0) | (Y != 0) -> (X|Y != 0)
+        // (X == 0) & (Y == 0) -> (X|Y == 0)
+        if (LR == RR && isa<ConstantSDNode>(LR) &&
+            cast<ConstantSDNode>(LR)->getValue() == 0 &&
+            Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) {
+          if ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
+              (Op2 == ISD::SETNE && Opcode == ISD::OR))
+            return getSetCC(Op2, VT, 
+                            getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
+        }
+
         // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
         if (LL == RR && LR == RL) {
           Op2 = ISD::getSetCCSwappedOperands(Op2);