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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-10-09 17:32:36 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-10-15 15:40:45 +0000 |
| commit | f7ff184da8ef859296ab4fd10c775ad043744540 (patch) | |
| tree | 4d35d033bdb14fece604874135a0dce35553ba14 | |
| parent | 6cbe8ac79b9206cf4de2cfb529abe2a976265922 (diff) | |
XXX: Uniform br
| -rw-r--r-- | lib/Target/AMDGPU/SIInstructions.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index a0f1098a5d9..b6c7bc08cd8 100644 --- a/lib/Target/AMDGPU/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td @@ -3139,7 +3139,7 @@ def : ZExt_i64_i1_Pat<anyext>; def : Pat < (i64 (sext i32:$src)), (REG_SEQUENCE SReg_64, $src, sub0, - (S_ASHR_I32 $src, 31), sub1) + (i32 (COPY_TO_REGCLASS (S_ASHR_I32 $src, 31), SGPR_32)), sub1) >; def : Pat < |