diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2015-10-08 15:22:17 +0000 |
---|---|---|
committer | Tom Stellard <thomas.stellard@amd.com> | 2015-10-15 15:39:11 +0000 |
commit | 1367e82d8042119cc0091438e04489acfa473b9f (patch) | |
tree | 8b2d8ce9b81441060387cfcd6b66580cc9dca3f8 | |
parent | 11f09f3e48976416e993b438f859551aab27a039 (diff) |
AMDGPU: Move StructurizeCFG pass into PassConfig sub-classes
We may want to do something GCN specifix for this in the future.
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 14f28d16b8b..5a80de900c4 100644 --- a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -210,10 +210,7 @@ void AMDGPUPassConfig::addCodeGenPrepare() { bool AMDGPUPassConfig::addPreISel() { - const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); addPass(createFlattenCFGPass()); - if (ST.IsIRStructurizerEnabled()) - addPass(createStructurizeCFGPass()); return false; } @@ -233,6 +230,9 @@ bool AMDGPUPassConfig::addGCPasses() { bool R600PassConfig::addPreISel() { AMDGPUPassConfig::addPreISel(); + const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); + if (ST.IsIRStructurizerEnabled()) + addPass(createStructurizeCFGPass()); addPass(createR600TextureIntrinsicsReplacer()); return false; } @@ -267,6 +267,7 @@ TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) { bool GCNPassConfig::addPreISel() { AMDGPUPassConfig::addPreISel(); + addPass(createStructurizeCFGPass()); addPass(createSinkingPass()); addPass(createSITypeRewriter()); addPass(createSIAnnotateControlFlowPass()); |