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authorRichard Barton <richard.barton@arm.com>2014-05-01 11:37:44 +0000
committerRichard Barton <richard.barton@arm.com>2014-05-01 11:37:44 +0000
commit8b88679164bfe1bf70dff504c86789f809a15563 (patch)
tree60f746f4991ef5d80368da8ef5054806d8ba8631
parent06ace3c8697a80f87773f51eb355c9f85fb01e61 (diff)
Correction to assert statemtent to allow 32-bit unsigned numbers with the top bit set.
This fixes an ARM assembler crash - regression test added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207747 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp4
-rw-r--r--test/MC/ARM/thumb2-diagnostics.s7
2 files changed, 9 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index a8227fcc10b..987f14d5dcb 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9487,8 +9487,8 @@ unsigned ARMAsmParser::validateTargetOperandClass(MCParsedAsmOperand *AsmOp,
int64_t Value;
if (!SOExpr->EvaluateAsAbsolute(Value))
return Match_Success;
- assert((Value >= INT32_MIN && Value <= INT32_MAX) &&
- "expression value must be representiable in 32 bits");
+ assert((Value >= INT32_MIN && Value <= UINT32_MAX) &&
+ "expression value must be representable in 32 bits");
}
break;
case MCK_GPRPair:
diff --git a/test/MC/ARM/thumb2-diagnostics.s b/test/MC/ARM/thumb2-diagnostics.s
index bb96db05b92..b2b14bc13d6 100644
--- a/test/MC/ARM/thumb2-diagnostics.s
+++ b/test/MC/ARM/thumb2-diagnostics.s
@@ -81,3 +81,10 @@ foo2:
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
@ CHECK-ERRORS: ^
+
+ and sp, r1, #80008000
+ and pc, r1, #80008000
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: error: invalid operand for instruction
+
+