diff options
author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-11-06 14:36:45 +0000 |
---|---|---|
committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2014-11-06 14:36:45 +0000 |
commit | f0f66a254df42d76baef884a14862105e1fc4072 (patch) | |
tree | 13099eab893d91d235ca506b125805205e35faa4 | |
parent | 22cfcb246956ca0bc3271521cae314c509ecc1c8 (diff) |
[X86] When commuting SSE immediate blend, make sure that the new blend mask is a valid imm8.
Example:
define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
ret <4 x i32> %shuffle
}
Before llc (-mattr=+sse4.1), produced the following assembly instruction:
pblendw $4294967103, %xmm1, %xmm0
After
pblendw $63, %xmm1, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221455 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 3 | ||||
-rw-r--r-- | test/CodeGen/X86/commuted-blend-mask.ll | 13 |
2 files changed, 15 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index dd463f15b32..a49dcc7d160 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2449,7 +2449,8 @@ X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const { case X86::VPBLENDDYrri: Mask = 0xFF; break; case X86::VPBLENDWYrri: Mask = 0xFF; break; } - unsigned Imm = MI->getOperand(3).getImm(); + // Only the least significant bits of Imm are used. + unsigned Imm = MI->getOperand(3).getImm() & Mask; if (NewMI) { MachineFunction &MF = *MI->getParent()->getParent(); MI = MF.CloneMachineInstr(MI); diff --git a/test/CodeGen/X86/commuted-blend-mask.ll b/test/CodeGen/X86/commuted-blend-mask.ll new file mode 100644 index 00000000000..e6322cbb7a1 --- /dev/null +++ b/test/CodeGen/X86/commuted-blend-mask.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s + +; When commuting the operands of a SSE blend, make sure that the resulting blend +; mask can be encoded as a imm8. +; Before, when commuting the operands to the shuffle in function @test, the backend +; produced the following assembly: +; pblendw $4294967103, %xmm1, %xmm0 + +define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) { + ;CHECK: pblendw $63, %xmm1, %xmm0 + %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3> + ret <4 x i32> %shuffle +} |