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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-02-22 11:22:58 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-02-22 11:22:58 +0000 |
| commit | 890dc926808587a193d705b89163b5a0c64444d9 (patch) | |
| tree | eb318e7f1c81351eef59cc5a5d3f0cc5bb641f19 | |
| parent | dd24703f95676c148171f2c0b8431b7c1baf6601 (diff) | |
R600/SI: Add pattern for sign extension of i1 to i32.
16 more little piglits with radeonsi.
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175887 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 2e43f9e5fdb..907cf49c6c3 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1382,6 +1382,11 @@ def : Pat < 0, 0, 0, 0), sub3) >; +def : Pat < + (i32 (sext (i1 SReg_64:$src0))), + (V_CNDMASK_B32_e64 (i32 0), (i32 -1), SReg_64:$src0) +>; + /********** ================== **********/ /********** VOP3 Patterns **********/ /********** ================== **********/ |