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authorTom Stellard <thomas.stellard@amd.com>2013-02-13 14:11:18 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-02-13 14:11:18 +0000
commit7761975e639b91e73ef1aab5eb78fd461ee66d40 (patch)
tree477c65d3febe56b2ba84c06bc023db44b49a0466
parent0d72a29cbf99dadca30f0899b307996aeecc7adf (diff)
XXX: Indirect fixessched-fixes
-rw-r--r--lib/Target/R600/AMDGPUIndirectAddressing.cpp14
1 files changed, 9 insertions, 5 deletions
diff --git a/lib/Target/R600/AMDGPUIndirectAddressing.cpp b/lib/Target/R600/AMDGPUIndirectAddressing.cpp
index 56aaf23cae9..02d865e4fb4 100644
--- a/lib/Target/R600/AMDGPUIndirectAddressing.cpp
+++ b/lib/Target/R600/AMDGPUIndirectAddressing.cpp
@@ -137,6 +137,8 @@ bool AMDGPUIndirectAddressingPass::runOnMachineFunction(MachineFunction &MF) {
}
}
+ MF.dump();
+
// Second pass - Lower the RegisterLoad instructions
for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
BB != BB_E; ++BB) {
@@ -169,9 +171,9 @@ bool AMDGPUIndirectAddressingPass::runOnMachineFunction(MachineFunction &MF) {
}
if (RegisterAddressMap[Reg] == Address) {
- if (!regHasExplicitDef(MRI, Reg)) {
- continue;
- }
+// if (!regHasExplicitDef(MRI, Reg)) {
+// continue;
+// }
PhiRegisters.push_back(Reg);
}
}
@@ -255,7 +257,8 @@ bool AMDGPUIndirectAddressingPass::runOnMachineFunction(MachineFunction &MF) {
unsigned Reg = LiveAddressRegisterMap[Address];
unsigned AddrReg = IndirectLoadRegClass->getRegister(Address);
- if (regHasExplicitDef(MRI, Reg)) {
+ if (MRI.getVRegDef(Reg)->getOpcode() != AMDGPU::PHI &&
+ regHasExplicitDef(MRI, Reg)) {
// If the register we are reading from has an explicit def, then that
// means it was written via a direct register access (i.e. COPY
// or other instruction that doesn't use indirect addressing). In
@@ -270,7 +273,8 @@ bool AMDGPUIndirectAddressingPass::runOnMachineFunction(MachineFunction &MF) {
// instruction that uses indirect addressing.
BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDGPU::COPY),
MI.getOperand(0).getReg())
- .addReg(AddrReg);
+ .addReg(AddrReg)
+ .addReg(Reg, RegState::Implicit);
}
} else {
// Indirect register access