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authorTom Stellard <thomas.stellard@amd.com>2012-09-05 14:36:21 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-09-14 16:00:08 +0000
commit8a59280ac12b359575c6d7937a7b072468844c1e (patch)
treeb5a8db3152948383f3b029427e4bd98a8a154b8d
parent4c6885c9b3a3538882d594c623f864551e4d24ca (diff)
R600: Fix operand order of V_CNDMASK in custom inserter
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
-rw-r--r--lib/Target/AMDGPU/SIISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/SIISelLowering.cpp b/lib/Target/AMDGPU/SIISelLowering.cpp
index 42c2e7f7ceb..3f23949ae90 100644
--- a/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -261,8 +261,8 @@ void SITargetLowering::LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB,
BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CNDMASK_B32))
.addOperand(MI->getOperand(0))
- .addOperand(MI->getOperand(2))
.addOperand(MI->getOperand(3))
+ .addOperand(MI->getOperand(2))
.addReg(AMDGPU::VCC);
MI->eraseFromParent();