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| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2013-10-10 17:11:19 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2013-10-10 17:11:19 +0000 |
| commit | f7eaeaef4efafd1fc83f31439c9ba193e711c687 (patch) | |
| tree | 60bae601ce2c2e641e758cb74067c2b716cdc700 | |
| parent | c6e924a70acacecf9b87ab46cff04efa38359be6 (diff) | |
R600/SI: Mark the EXEC register as reserved
This prevents the machine verifier from complaining about uses of
an undefined physical register.
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192364 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/R600/SIRegisterInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/R600/SIRegisterInfo.cpp b/lib/Target/R600/SIRegisterInfo.cpp index 5d12564fe8b..7f69ef6f286 100644 --- a/lib/Target/R600/SIRegisterInfo.cpp +++ b/lib/Target/R600/SIRegisterInfo.cpp @@ -25,6 +25,7 @@ SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm) BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); + Reserved.set(AMDGPU::EXEC); return Reserved; } |