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authorAndrew Trick <atrick@apple.com>2012-04-24 18:04:41 +0000
committerAndrew Trick <atrick@apple.com>2012-04-24 18:04:41 +0000
commitc3ad885dac8b4ed1a092e3276aeb84810a4a250c (patch)
tree20ae2721302969bc0bcdd66776b7c606c6e7717c
parent000b2504eef6c1ff4a7857087b0a1cbe0f7e1b1a (diff)
misched: DAG builder must special case earlyclobber
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155459 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/ScheduleDAGInstrs.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp
index e2f33aa7358..ed85963cc86 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -442,6 +442,15 @@ void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot();
LiveInterval *LI = &LIS->getInterval(Reg);
VNInfo *VNI = LI->getVNInfoBefore(UseIdx);
+
+ // Special case: An early-clobber tied operand reads and writes the
+ // register one slot early. e.g. InlineAsm.
+ //
+ // FIXME: Same special case is in shrinkToUses. Hide under an API.
+ if (SlotIndex::isSameInstr(VNI->def, UseIdx)) {
+ UseIdx = VNI->def;
+ VNI = LI->getVNInfoBefore(UseIdx);
+ }
// VNI will be valid because MachineOperand::readsReg() is checked by caller.
MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
// Phis and other noninstructions (after coalescing) have a NULL Def.