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authorNadav Rotem <nadav.rotem@intel.com>2012-04-24 18:09:59 +0000
committerNadav Rotem <nadav.rotem@intel.com>2012-04-24 18:09:59 +0000
commit7bc9698f3a5e9ebfc85214c5e75261edf35809e5 (patch)
tree264fcc4cf275eded108488eb6dc5afb8e6b21991
parent63bbe14e203c13336a197e0acc784158924dba8a (diff)
AVX: Add additional vbroadcast replacement sequences for integers.
Remove the v2f64 patterns because it does not match any vbroadcast instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155461 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrSSE.td33
1 files changed, 30 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 8cd00a9aa0e..aa3e08bd4dc 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -7736,6 +7736,16 @@ let Predicates = [HasAVX2] in {
def : Pat<(v4f64 (X86VBroadcast FR64:$src)),
(VBROADCASTSDrr
(INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src, sub_sd))>;
+
+ def : Pat<(v4i32 (X86VBroadcast GR32:$src)),
+ (VBROADCASTSSrr
+ (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), GR32:$src, sub_ss))>;
+ def : Pat<(v8i32 (X86VBroadcast GR32:$src)),
+ (VBROADCASTSSYrr
+ (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), GR32:$src, sub_ss))>;
+ def : Pat<(v4i64 (X86VBroadcast GR64:$src)),
+ (VBROADCASTSDrr
+ (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)), GR64:$src, sub_sd))>;
}
}
@@ -7758,9 +7768,6 @@ def : Pat<(v4i32 (X86VBroadcast (loadi32 addr:$src))),
// is used by additional users, which prevents the pattern selection.
let AddedComplexity = 20 in {
// 128bit broadcasts:
- def : Pat<(v2f64 (X86VBroadcast FR64:$src)),
- (VPSHUFDri
- (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src, sub_sd), 0)>;
def : Pat<(v4f32 (X86VBroadcast FR32:$src)),
(VPSHUFDri
(INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src, sub_ss), 0)>;
@@ -7780,6 +7787,26 @@ def : Pat<(v4i32 (X86VBroadcast (loadi32 addr:$src))),
(VPSHUFDri
(INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), FR64:$src, sub_sd),
0), 1)>;
+
+ def : Pat<(v4i32 (X86VBroadcast GR32:$src)),
+ (VPSHUFDri
+ (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), GR32:$src, sub_ss), 0)>;
+ def : Pat<(v8i32 (X86VBroadcast GR32:$src)),
+ (VINSERTF128rr (INSERT_SUBREG (v8i32 (IMPLICIT_DEF)),
+ (VPSHUFDri
+ (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), GR32:$src, sub_ss), 0),
+ sub_xmm),
+ (VPSHUFDri
+ (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), GR32:$src, sub_ss),
+ 0), 1)>;
+ def : Pat<(v4i64 (X86VBroadcast GR64:$src)),
+ (VINSERTF128rr (INSERT_SUBREG (v4i64 (IMPLICIT_DEF)),
+ (VPSHUFDri
+ (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)), GR64:$src, sub_sd), 0),
+ sub_xmm),
+ (VPSHUFDri
+ (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)), GR64:$src, sub_sd),
+ 0), 1)>;
}
}