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| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-10 15:03:03 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-10 15:03:03 +0000 |
| commit | 32bcd5a2a5b0f3c46754867a06ad62630161ccf4 (patch) | |
| tree | 88db26d63e276a491d560704aba44824c024b27e | |
| parent | 6d28bf65b920fc0b231cc52000b2b479dde64e13 (diff) | |
R600: Fix typo in SETGE_UINT pattern
The operands to SETGE_UINT were reversed.
Fixes piglit test:
Program/Execute/Scalar comparison uint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165622 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/AMDGPU/R600Instructions.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index 6da756215e7..0a1cd345fdb 100644 --- a/lib/Target/AMDGPU/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td @@ -1428,7 +1428,7 @@ def : Pat < // SETGE_UINT reverse args def : Pat < (selectcc (i32 R600_Reg32:$src0), R600_Reg32:$src1, -1, 0, SETULE), - (SETGE_UINT R600_Reg32:$src0, R600_Reg32:$src1) + (SETGE_UINT R600_Reg32:$src1, R600_Reg32:$src0) >; // The next two patterns are special cases for handling 'true if ordered' and |