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| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-03 20:49:29 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-03 20:49:29 +0000 |
| commit | 1e145cb14643d5835e4c3275d392cd161cad569e (patch) | |
| tree | 3a30dd1d980468b43183479c1f71634d7db82ad3 | |
| parent | 0dab553f5f1d16045534254b9ce66972a03424f7 (diff) | |
R600: Add support for v4i32 global stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165152 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/AMDGPU/R600Instructions.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td index 4336105d4ed..033ae154f44 100644 --- a/lib/Target/AMDGPU/R600Instructions.td +++ b/lib/Target/AMDGPU/R600Instructions.td @@ -1083,6 +1083,12 @@ def : Pat < (RAT_WRITE_CACHELESS_128_eg R600_Reg128:$val, R600_TReg32_X:$ptr, 0) >; +// v4i32 global store +def : Pat < + (global_store (v4i32 R600_Reg128:$val), R600_TReg32_X:$ptr), + (RAT_WRITE_CACHELESS_128_eg R600_Reg128:$val, R600_TReg32_X:$ptr, 0) +>; + class VTX_READ_eg <bits<8> buffer_id, dag outs, list<dag> pattern> : InstR600ISA <outs, (ins MEMxi:$ptr), "VTX_READ_eg $dst, $ptr", pattern> { |