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authorTom Stellard <thomas.stellard@amd.com>2013-12-18 18:10:01 -0500
committerTom Stellard <thomas.stellard@amd.com>2013-12-18 18:10:01 -0500
commitdd243c6691ebd65e0cb6a65bc33b15bfe09da82c (patch)
tree55d578e7a62ed87dc381eddbca4b27a732b0aaab
parentae6d398770ad0352d46f4ced618cb2e95eff145f (diff)
XXX: Const fixesmaster-testing-si
-rw-r--r--lib/Target/R600/SIISelLowering.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp
index 9378745922d..161a5e06cd3 100644
--- a/lib/Target/R600/SIISelLowering.cpp
+++ b/lib/Target/R600/SIISelLowering.cpp
@@ -880,8 +880,10 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
Mask = 0xffff;
}
SDValue Dst = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, MVT::i32,
- Chain, TruncPtr, DAG.getConstant(0, MVT::i32));
- SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32, TruncPtr,
+ Chain, Store->getBasePtr(),
+ DAG.getConstant(0, MVT::i32));
+ SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32,
+ Store->getBasePtr(),
DAG.getConstant(0x3, MVT::i32));
SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx,
DAG.getConstant(3, MVT::i32));