ADMGPU: Add helper function for setting instructions modifiers

3 files changed, 16 insertions, 9 deletions

diff --git a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
index f9fd65d2a06..e040e4c49ad 100644
--- a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
+++ b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
@@ -192,12 +192,9 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
                                             AMDGPU::ZERO);             // src1
         TII->addFlag(PredSet, 0, MO_FLAG_MASK);
         if (Flags & MO_FLAG_PUSH) {
-          PredSet->getOperand(TII->getOperandIdx(
-                  *PredSet, R600Operands::UPDATE_EXEC_MASK)).setImm(1);
+          TII->setImmOperand(PredSet, R600Operands::UPDATE_EXEC_MASK, 1);
         } else {
-          PredSet->getOperand(
-            TII->getOperandIdx(
-                  *PredSet, R600Operands::UPDATE_PREDICATE)).setImm(1);
+          TII->setImmOperand(PredSet, R600Operands::UPDATE_PREDICATE, 1);
         }
         MI.eraseFromParent();
         continue;
@@ -209,9 +206,7 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
                                           AMDGPU::ZERO,
                                           AMDGPU::ZERO);
         TII->addFlag(PredSet, 0, MO_FLAG_MASK);
-        PredSet->getOperand(
-          TII->getOperandIdx(
-              *PredSet, R600Operands::UPDATE_EXEC_MASK)).setImm(1);
+        TII->setImmOperand(PredSet, R600Operands::UPDATE_EXEC_MASK, 1);
 
         BuildMI(MBB, I, MBB.findDebugLoc(I),
                 TII->get(AMDGPU::BREAK_LOGICALNZ_i32))
diff --git a/lib/Target/AMDGPU/R600InstrInfo.cpp b/lib/Target/AMDGPU/R600InstrInfo.cpp
index 49169d7816e..7c5b19ed3ca 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -528,7 +528,7 @@ MachineInstr *R600InstrInfo::buildMovImm(MachineBasicBlock &BB,
 {
   MachineInstr *MovImm = buildDefaultInstruction(BB, I, AMDGPU::MOV, DstReg,
                                                   AMDGPU::ALU_LITERAL_X);
-  MovImm->getOperand(getOperandIdx(*MovImm, R600Operands::IMM)).setImm(Imm);
+  setImmOperand(MovImm, R600Operands::IMM, Imm);
   return MovImm;
 }
 
@@ -573,6 +573,15 @@ int R600InstrInfo::getOperandIdx(const MachineInstr &MI,
   return OpTable[OpTableIdx][Op];
 }
 
+void R600InstrInfo::setImmOperand(MachineInstr *MI, R600Operands::Ops Op,
+                                  int64_t Imm) const
+{
+  int Idx = getOperandIdx(*MI, Op);
+  assert(Idx != -1 && "Operand not supported for this instruction.");
+  assert(MI->getOperand(Idx).isImm());
+  MI->getOperand(Idx).setImm(Imm);
+}
+
 //===----------------------------------------------------------------------===//
 // Instruction flag getters/setters
 //===----------------------------------------------------------------------===//
diff --git a/lib/Target/AMDGPU/R600InstrInfo.h b/lib/Target/AMDGPU/R600InstrInfo.h
index 3cf3cc16769..cec1c3bd38a 100644
--- a/lib/Target/AMDGPU/R600InstrInfo.h
+++ b/lib/Target/AMDGPU/R600InstrInfo.h
@@ -130,6 +130,9 @@ namespace llvm {
   /// if the Instruction does not contain the specified Op.
   int getOperandIdx(const MachineInstr &MI, R600Operands::Ops Op) const;
 
+  /// setImmOperand - Helper function for setting instruction flag values.
+  void setImmOperand(MachineInstr *MI, R600Operands::Ops Op, int64_t Imm) const;
+
   ///hasFlagOperand - Returns true if this instruction has an operand for
   /// storing target flags.
   bool hasFlagOperand(const MachineInstr &MI) const;