diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2012-11-02 19:08:31 +0000 |
---|---|---|
committer | Tom Stellard <thomas.stellard@amd.com> | 2012-11-02 19:08:31 +0000 |
commit | 2e13956788636717cb3a2e405e78aa5fcf31503c (patch) | |
tree | 37f26a198ba34253288ae981ab8a50a49003d4e1 | |
parent | 07b550f8f51741f1b941b468d0b75af252b73194 (diff) |
XXX: Backout LiveInterval changes and don't run MachineCSEindirect-wip
-rw-r--r-- | include/llvm/CodeGen/LiveIntervalAnalysis.h | 1 | ||||
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 34 | ||||
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 |
3 files changed, 0 insertions, 36 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index 413553ced3a..b421753dd53 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -384,7 +384,6 @@ namespace llvm { void dumpInstrs() const; void computeLiveInRegUnits(); - void computePhysRegs(); void computeRegUnitInterval(LiveInterval*); void computeVirtRegInterval(LiveInterval*); diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 5fa4dd09379..65bc4af99e2 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -125,7 +125,6 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { computeIntervals(); } computeLiveInRegUnits(); - computePhysRegs(); DEBUG(dump()); return true; @@ -598,39 +597,6 @@ void LiveIntervals::computeLiveInRegUnits() { computeRegUnitInterval(NewIntvs[i]); } -void LiveIntervals::computePhysRegs() { - - // Keep track of the intervals allocated. - SmallVector<LiveInterval*, 8> NewIntvs; - - for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); - MFI != MFE; ++MFI) { - const MachineBasicBlock *MBB = MFI; - for (MachineBasicBlock::const_iterator MBI = MBB->begin(), MBE = MBB->end(); - MBI != MBE; ++MBI) { - const MachineInstr *MI = MBI; - for (unsigned i = 0, e = MI->getNumOperands(); i < e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - if (!MO.isReg() || !MO.isDef() || - !TargetRegisterInfo::isPhysicalRegister(MO.getReg())) { - continue; - } - for (MCRegUnitIterator Units(MO.getReg(), TRI); Units.isValid(); - ++Units) { - unsigned Unit = *Units; - LiveInterval *Intv = RegUnitIntervals[Unit]; - if (!Intv) { - Intv = RegUnitIntervals[Unit] = new LiveInterval(Unit, HUGE_VALF); - NewIntvs.push_back(Intv); - } - } - } - } - } - // Compute the 'normal' part of the intervals. - for (unsigned i = 0, e = NewIntvs.size(); i != e; ++i) - computeRegUnitInterval(NewIntvs[i]); -} /// shrinkToUses - After removing some uses of a register, shrink its live /// range to just the remaining uses. This method does not compute reaching diff --git a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index b63f662eef1..5b989894402 100644 --- a/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -118,7 +118,6 @@ bool AMDGPUPassConfig::addPostRegAlloc() { const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) { addPass(createR600AllocateMemoryRegsPass(*TM)); - addPass(&MachineCSEID); } return false; } |