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authorTom Stellard <thomas.stellard@amd.com>2016-03-22 23:21:03 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-03-30 18:42:20 +0000
commitaf33d2eca05c453aa81c78bb8c863f1c40d69cf4 (patch)
tree33b1fe05ced70bd3a9544471a6aef11854e220cb
parenteaf3ed0f35cb2a0b2d2e44f55f9438425d9a4a3d (diff)
AMDGPU: Implement SIRegisterInfo::getRegPressureSetScore()hazard-rec
This tells the scheduler it is better to increase SGPR register pressure than VGPR register pressure. This could probably be made smarter in the future.
-rw-r--r--lib/Target/AMDGPU/SIRegisterInfo.cpp19
-rw-r--r--lib/Target/AMDGPU/SIRegisterInfo.h3
2 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/SIRegisterInfo.cpp b/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 48de0cf1302..324e5c40db4 100644
--- a/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -187,6 +187,25 @@ unsigned SIRegisterInfo::getRegPressureSetLimit(const MachineFunction &MF,
return VGPRLimit;
}
+unsigned SIRegisterInfo::getRegPressureSetScore(const MachineFunction &MF,
+ unsigned PSetID) const {
+
+ if (SGPRPressureSets.test(PSetID)) {
+ if (VGPRPressureSets.test(PSetID)) {
+ // If a pressure set contains vgprs and sgprs then we prefer incresing
+ // its pressure over regular register classes. This has the hightest
+ // score.
+ return 2;
+ }
+ // If this is an SGPR pressure set we prefer increasing its pressure
+ // over VGPR pressure sets.
+ return 1;
+ }
+
+ // VGPRS.
+ return 0;
+}
+
bool SIRegisterInfo::requiresRegisterScavenging(const MachineFunction &Fn) const {
return Fn.getFrameInfo()->hasStackObjects();
}
diff --git a/lib/Target/AMDGPU/SIRegisterInfo.h b/lib/Target/AMDGPU/SIRegisterInfo.h
index 1888398917a..e8e2d1f8734 100644
--- a/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -51,6 +51,9 @@ public:
unsigned getRegPressureSetLimit(const MachineFunction &MF,
unsigned Idx) const override;
+ unsigned getRegPressureSetScore(const MachineFunction &MF,
+ unsigned PSetID) const override;
+
bool requiresRegisterScavenging(const MachineFunction &Fn) const override;
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;