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authorTom Stellard <thomas.stellard@amd.com>2014-01-30 16:05:33 -0500
committerTom Stellard <thomas.stellard@amd.com>2014-01-31 18:06:43 -0500
commitf969010a63b2686fa8eeaec3e2b42d9aec02cea1 (patch)
tree68aa0d3f59e62a7993aeb0168b11cac24d728482
parentfe58f0ba61cf9245df521ff731c541c98cb115b1 (diff)
R600/SI: Add a MUBUF store pattern for Reg+Imm offsets
-rw-r--r--lib/Target/R600/SIInstrInfo.td5
-rw-r--r--lib/Target/R600/SIInstructions.td7
-rw-r--r--test/CodeGen/R600/mubuf.ll12
3 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index 871509f1942..988ac37af61 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -103,6 +103,11 @@ def IMM12bit : PatLeaf <(imm),
[{return isUInt<12>(N->getZExtValue());}]
>;
+def mubuf_vaddr_offset : PatFrag<
+ (ops node:$ptr, node:$offset, node:$imm_offset),
+ (add (add node:$ptr, node:$offset), node:$imm_offset)
+>;
+
class InlineImm <ValueType vt> : PatLeaf <(vt imm), [{
return
(*(const SITargetLowering *)getTargetLowering()).analyzeImmediate(N) == 0;
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index b8a52e27118..06497bb94f5 100644
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1938,7 +1938,7 @@ defm : SMRD_Pattern <S_LOAD_DWORDX16_IMM, S_LOAD_DWORDX16_SGPR, v16i32>;
multiclass MUBUFLoad_Pattern <MUBUF Instr_ADDR64, ValueType vt,
PatFrag global_ld, PatFrag constant_ld> {
def : Pat <
- (vt (global_ld (add (add i64:$ptr, i64:$offset), IMM12bit:$imm_offset))),
+ (vt (global_ld (mubuf_vaddr_offset i64:$ptr, i64:$offset, IMM12bit:$imm_offset))),
(Instr_ADDR64 (SI_ADDR64_RSRC $ptr), $offset, (as_i16imm $imm_offset))
>;
@@ -1985,6 +1985,11 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX4_ADDR64, v4i32,
multiclass MUBUFStore_Pattern <MUBUF Instr, ValueType vt, PatFrag st> {
def : Pat <
+ (st vt:$value, (mubuf_vaddr_offset i64:$ptr, i64:$offset, IMM12bit:$imm_offset)),
+ (Instr $value, (SI_ADDR64_RSRC $ptr), $offset, (as_i16imm $imm_offset))
+ >;
+
+ def : Pat <
(st vt:$value, (add i64:$ptr, IMM12bit:$offset)),
(Instr $value, (SI_ADDR64_RSRC (i64 0)), $ptr, (as_i16imm $offset))
>;
diff --git a/test/CodeGen/R600/mubuf.ll b/test/CodeGen/R600/mubuf.ll
index fd039611109..2d5ddeb9385 100644
--- a/test/CodeGen/R600/mubuf.ll
+++ b/test/CodeGen/R600/mubuf.ll
@@ -84,3 +84,15 @@ entry:
store i32 0, i32 addrspace(1)* %0
ret void
}
+
+; MUBUF store with a 12-bit immediate offset and a register offset
+; CHECK-LABEL: @mubuf_store3
+; CHECK-NOT: ADD
+; CHECK: BUFFER_STORE_DWORD v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 4 ; encoding: [0x04,0x80
+define void @mubuf_store3(i32 addrspace(1)* %out, i64 %offset) {
+entry:
+ %0 = getelementptr i32 addrspace(1)* %out, i64 %offset
+ %1 = getelementptr i32 addrspace(1)* %0, i64 1
+ store i32 0, i32 addrspace(1)* %1
+ ret void
+}