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authortstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-15 20:53:39 +0000
committertstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-15 20:53:39 +0000
commitc451e5482c2331c820a1dc89bd125eef51872dd2 (patch)
treebb58c5364751b6dfc5f78359a022d45c4a27f8be
parenta5758180dfc5d2000739c9296111ad93ad79b657 (diff)
R600: add a pattern for fsqrt
Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@165966 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AMDGPU/R600Instructions.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td
index 0a1cd345fdb..db6139fa61f 100644
--- a/lib/Target/AMDGPU/R600Instructions.td
+++ b/lib/Target/AMDGPU/R600Instructions.td
@@ -1038,6 +1038,9 @@ let Predicates = [isEGorCayman] in {
def : Pat<(fp_to_uint R600_Reg32:$src),
(FLT_TO_UINT_eg (TRUNC R600_Reg32:$src))>;
+ def : Pat<(fsqrt R600_Reg32:$src),
+ (MUL R600_Reg32:$src, (RECIPSQRT_CLAMPED_eg R600_Reg32:$src))>;
+
//===----------------------------------------------------------------------===//
// Memory read/write instructions
//===----------------------------------------------------------------------===//