diff options
| author | Michel Dänzer <michel.daenzer@amd.com> | 2012-11-08 16:04:10 +0100 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-11-12 16:02:47 +0000 |
| commit | bbf36f3f05aaf86fac356904a51c232d9fdfc6f5 (patch) | |
| tree | 25be6fde2ebf7d2068d2476b09ca55e0d6809ea6 | |
| parent | c904ce00b71abd03d4d657e5a30affa60f634363 (diff) | |
SI: Add intrinsic for sampling with explicit LOD.
Patch by: Michel Dänzer
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
| -rw-r--r-- | lib/Target/AMDGPU/SIInstructions.td | 9 | ||||
| -rw-r--r-- | lib/Target/AMDGPU/SIIntrinsics.td | 1 |
2 files changed, 9 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index aa31bb5718d..8512b48508c 100644 --- a/lib/Target/AMDGPU/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td @@ -495,7 +495,7 @@ defm S_LOAD_DWORDX8 : SMRD_Helper <0x00000003, "S_LOAD_DWORDX8", SReg_256, v8i32 //def IMAGE_ATOMIC_FMAX : MIMG_NoPattern_ <"IMAGE_ATOMIC_FMAX", 0x0000001f>; def IMAGE_SAMPLE : MIMG_Load_Helper <0x00000020, "IMAGE_SAMPLE">; //def IMAGE_SAMPLE_CL : MIMG_NoPattern_ <"IMAGE_SAMPLE_CL", 0x00000021>; -//def IMAGE_SAMPLE_D : MIMG_NoPattern_ <"IMAGE_SAMPLE_D", 0x00000022>; +def IMAGE_SAMPLE_D : MIMG_Load_Helper <0x00000022, "IMAGE_SAMPLE_D">; //def IMAGE_SAMPLE_D_CL : MIMG_NoPattern_ <"IMAGE_SAMPLE_D_CL", 0x00000023>; //def IMAGE_SAMPLE_L : MIMG_NoPattern_ <"IMAGE_SAMPLE_L", 0x00000024>; def IMAGE_SAMPLE_B : MIMG_Load_Helper <0x00000025, "IMAGE_SAMPLE_B">; @@ -1131,6 +1131,13 @@ def : Pat < SReg_256:$rsrc, SReg_128:$sampler) >; +/* int_SI_sample_lod */ +def : Pat < + (int_SI_sample_lod imm:$writemask, VReg_128:$coord, SReg_256:$rsrc, SReg_128:$sampler), + (IMAGE_SAMPLE_D imm:$writemask, 0, 0, 0, 0, 0, 0, 0, VReg_128:$coord, + SReg_256:$rsrc, SReg_128:$sampler) +>; + /* int_SI_sample_bias */ def : Pat < (int_SI_sample_bias imm:$writemask, VReg_128:$coord, SReg_256:$rsrc, SReg_128:$sampler), diff --git a/lib/Target/AMDGPU/SIIntrinsics.td b/lib/Target/AMDGPU/SIIntrinsics.td index f8039d17a36..1008fc42ccf 100644 --- a/lib/Target/AMDGPU/SIIntrinsics.td +++ b/lib/Target/AMDGPU/SIIntrinsics.td @@ -24,6 +24,7 @@ let TargetPrefix = "SI", isTarget = 1 in { def int_SI_sample : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_v4f32_ty, llvm_v8i32_ty, llvm_v4i32_ty], [IntrReadMem]>; def int_SI_sample_bias : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_v4f32_ty, llvm_v8i32_ty, llvm_v4i32_ty], [IntrReadMem]>; + def int_SI_sample_lod : Intrinsic <[llvm_v4f32_ty], [llvm_i32_ty, llvm_v4f32_ty, llvm_v8i32_ty, llvm_v4i32_ty], [IntrReadMem]>; /* Interpolation Intrinsics */ |