diff options
| author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-31 15:26:14 +0000 |
|---|---|---|
| committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-31 15:26:14 +0000 |
| commit | 03f7f7c611d6d15bea880a2d282d23b63ee0caf3 (patch) | |
| tree | a0d12f739aa28a57b5e3a2f8dd5a60d95cef9189 | |
| parent | 88fd57fa0e69622022345c336c97b3db58117f8d (diff) | |
SI: Use SReg_1 class for SI_IF_(N)Z condition code operand
Patch by: Michel Dänzer
Reviewed-by: Tom Stellard <thomas.stellar@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@167127 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/AMDGPU/SIInstructions.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td index 980bf63705f..8b4245d7988 100644 --- a/lib/Target/AMDGPU/SIInstructions.td +++ b/lib/Target/AMDGPU/SIInstructions.td @@ -1092,14 +1092,14 @@ let isBranch = 1, isTerminator = 1, mayLoad = 0, mayStore = 0, hasSideEffects = 0 in { def SI_IF_NZ : InstSI < (outs), - (ins brtarget:$target, VCCReg:$vcc), + (ins brtarget:$target, SReg_1:$vcc), "SI_BRANCH_NZ", - [(IL_brcond bb:$target, VCCReg:$vcc)] + [(IL_brcond bb:$target, SReg_1:$vcc)] >; def SI_IF_Z : InstSI < (outs), - (ins brtarget:$target, VCCReg:$vcc), + (ins brtarget:$target, SReg_1:$vcc), "SI_BRANCH_Z", [] >; |