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BranchCommit messageAuthorAge
assembler-pushR600/SI: Initial support for assembler and inline assemblyTom Stellard7 years
hazard-recAMDGPU: Implement SIRegisterInfo::getRegPressureSetScore()Tom Stellard6 years
madkR600/SI: Use v_madmk_f32Matt Arsenault7 years
perf-Jan-08-2015R600: Enable subreg livenessTom Stellard7 years
sched-perf-Mar-27-2015R600/SI: Disable register pressure tracking in the schedulerTom Stellard7 years
smrd-clusterR600/SI: Enable post-ra machine schedulerTom Stellard7 years
struct-divergenceXXX: remove debug prints.Tom Stellard6 years
struct-divergence-v1XXX: Struct fixesTom Stellard6 years
vgpr-spilling-Jan07-2014XXX: Clear some kill flags.Tom Stellard7 years
vinterp-fixR600/SI: Remove some unnecessary patterns from VINTRP multiclassTom Stellard7 years
[...]
 
TagDownloadAuthorAge
mesa-9.1.1commit ce7bbb8b46...Michel Danzer9 years
mesa-9.1commit 16ca877f58...Michel Danzer9 years
 
AgeCommit messageAuthorFilesLines
2013-06-04R600: Fix the fetch limits for R600 generation GPUsr600-gen-fixesTom Stellard6-27/+159
2013-06-04R600: Move Subtarget feature definitions into AMDGPU.tdTom Stellard2-64/+66
2013-06-04R600: Remove unnecessary includeTom Stellard3-2/+4
2013-06-05R600: Make sure to schedule AR register uses and defs in the same clauseTom Stellard4-4/+72
2013-06-05Don't print default values for NumberOfAuxSymbols and AuxiliaryData.Rafael Espindola3-2/+11
2013-06-05Handle (at least don't crash on) relocations with no symbols.Rafael Espindola1-6/+11
2013-06-05Move BinaryRef to a new include/llvm/Object/YAML.h file.Rafael Espindola6-51/+99
2013-06-05Revert "R600: Add a pass that merge Vector Register"Rafael Espindola5-400/+0
2013-06-05Handle relocations that don't point to symbols.Rafael Espindola19-73/+62
2013-06-04[docs] Replace non-existent LLVM_YAML_UNIQUE_TYPE() macroSean Silva1-1/+1
[...]
 
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