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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-03-14 10:22:21 -0500 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-03-21 11:31:23 -0500 |
| commit | 513dcab5f90efe780e9931bc0b4d8f415721dac4 (patch) | |
| tree | b599eef0b401217ea00dc0a6f604d23a6d471705 | |
| parent | c88de4d538a8e2b8bcaf206bbc1b02c35061cfce (diff) | |
radeonsi: implement volatile memory access
Prevent loads from being re-ordered or coalesced.
Atomics don't need special handling by definition, and stores don't need
special handling because LLVM is unable to detect dead image or buffer
stores.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index db0cc5bbf6..0d26957101 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2915,6 +2915,7 @@ static void load_emit( struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data) { + struct si_shader_context *ctx = si_shader_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; LLVMBuilderRef builder = gallivm->builder; const struct tgsi_full_instruction * inst = emit_data->inst; @@ -2922,6 +2923,9 @@ static void load_emit( char intrinsic_name[32]; char coords_type[8]; + if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) + emit_optimization_barrier(ctx); + if (target == TGSI_TEXTURE_BUFFER) { emit_data->output[emit_data->chan] = lp_build_intrinsic( builder, "llvm.amdgcn.buffer.load.format.v4f32", emit_data->dst_type, |