diff options
| author | Jordan Justen <jordan.l.justen@intel.com> | 2016-04-02 13:44:55 -0700 |
|---|---|---|
| committer | Jordan Justen <jordan.l.justen@intel.com> | 2016-05-17 13:04:03 -0700 |
| commit | 8ee31828c656d456bfe067cfae512b1fbbd0bbd6 (patch) | |
| tree | 487fab16e09877b862fe97a7e85f4f58dabadccb | |
| parent | ff417388719828b3b5f0c9e3c0b076e9cff99ff7 (diff) | |
anv: Keep track of whether the data cache should be enabled in L3
If images or shader buffers are used, we will enable the data cache in
the the L3 config.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
| -rw-r--r-- | src/intel/vulkan/anv_pipeline.c | 9 | ||||
| -rw-r--r-- | src/intel/vulkan/anv_private.h | 1 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 2 |
3 files changed, 11 insertions, 1 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 7d265d8d21..a17a1bb04f 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -332,8 +332,13 @@ anv_pipeline_compile(struct anv_pipeline *pipeline, if (pipeline->layout && pipeline->layout->stage[stage].has_dynamic_offsets) prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2; - if (nir->info.num_images > 0) + if (nir->info.num_images > 0) { prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE; + pipeline->needs_data_cache = true; + } + + if (nir->info.num_ssbos > 0) + pipeline->needs_data_cache = true; if (prog_data->nr_params > 0) { /* XXX: I think we're leaking this */ @@ -1113,6 +1118,8 @@ anv_pipeline_init(struct anv_pipeline *pipeline, pipeline->use_repclear = extra && extra->use_repclear; + pipeline->needs_data_cache = false; + /* When we free the pipeline, we detect stages based on the NULL status * of various prog_data pointers. Make them NULL by default. */ diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 9943677124..8afd47ffb0 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1403,6 +1403,7 @@ struct anv_pipeline { struct anv_pipeline_bind_map bindings[MESA_SHADER_STAGES]; bool use_repclear; + bool needs_data_cache; const struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES]; uint32_t scratch_start[MESA_SHADER_STAGES]; diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 2328920b65..2a41b2d91f 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -74,6 +74,8 @@ genX(compute_pipeline_create)( pipeline->active_stages = 0; pipeline->total_scratch = 0; + pipeline->needs_data_cache = false; + assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT); ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->stage.module); anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module, |