diff options
author | Sanjay Patel <spatel@rotateright.com> | 2016-07-09 18:52:07 +0000 |
---|---|---|
committer | Sanjay Patel <spatel@rotateright.com> | 2016-07-09 18:52:07 +0000 |
commit | ed029b06bb22d9f3ccef1c1b8619544ddeb920d5 (patch) | |
tree | 4c06a9adefe60856b540f0152b9ccc92cb8ee654 | |
parent | 99de733c642eeb914d428344f5b16a2f91cf040d (diff) |
fix documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274981 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 7 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 88 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypes.h | 169 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 45 |
4 files changed, 145 insertions, 164 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 6662a3f8637..b9626253d10 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -266,8 +266,7 @@ public: /// this factor, it is very likely to be predicted correctly. virtual BranchProbability getPredictableBranchThreshold() const; - /// isLoadBitCastBeneficial() - Return true if the following transform - /// is beneficial. + /// Return true if the following transform is beneficial: /// fold (conv (load x)) -> (load (conv*)x) /// On architectures that don't natively support some vector loads /// efficiently, casting the load to a smaller vector of larger types and @@ -291,9 +290,7 @@ public: return true; } - /// isStoreBitCastBeneficial() - Mirror of isLoadBitCastBeneficial(). Return - /// true if the following transform is beneficial. - /// + /// Return true if the following transform is beneficial: /// (store (y (conv x)), y*)) -> (store x, (x*)) virtual bool isStoreBitCastBeneficial(EVT StoreVT, EVT BitcastVT) const { // Default to the same logic as loads. diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp index ef5e4ca5ec2..432219e3e12 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp @@ -27,7 +27,7 @@ using namespace llvm; static cl::opt<bool> EnableExpensiveChecks("enable-legalize-types-checking", cl::Hidden); -/// PerformExpensiveChecks - Do extensive, expensive, sanity checking. +/// Do extensive, expensive, sanity checking. void DAGTypeLegalizer::PerformExpensiveChecks() { // If a node is not processed, then none of its values should be mapped by any // of PromotedIntegers, ExpandedIntegers, ..., ReplacedValues. @@ -174,9 +174,9 @@ void DAGTypeLegalizer::PerformExpensiveChecks() { } } -/// run - This is the main entry point for the type legalizer. This does a -/// top-down traversal of the dag, legalizing types as it goes. Returns "true" -/// if it made any changes. +/// This is the main entry point for the type legalizer. This does a top-down +/// traversal of the dag, legalizing types as it goes. Returns "true" if it made +/// any changes. bool DAGTypeLegalizer::run() { bool Changed = false; @@ -461,11 +461,10 @@ NodeDone: return Changed; } -/// AnalyzeNewNode - The specified node is the root of a subtree of potentially -/// new nodes. Correct any processed operands (this may change the node) and -/// calculate the NodeId. If the node itself changes to a processed node, it -/// is not remapped - the caller needs to take care of this. -/// Returns the potentially changed node. +/// The specified node is the root of a subtree of potentially new nodes. +/// Correct any processed operands (this may change the node) and calculate the +/// NodeId. If the node itself changes to a processed node, it is not remapped - +/// the caller needs to take care of this. Returns the potentially changed node. SDNode *DAGTypeLegalizer::AnalyzeNewNode(SDNode *N) { // If this was an existing node that is already done, we're done. if (N->getNodeId() != NewNode && N->getNodeId() != Unanalyzed) @@ -536,7 +535,7 @@ SDNode *DAGTypeLegalizer::AnalyzeNewNode(SDNode *N) { return N; } -/// AnalyzeNewValue - Call AnalyzeNewNode, updating the node in Val if needed. +/// Call AnalyzeNewNode, updating the node in Val if needed. /// If the node changes to a processed node, then remap it. void DAGTypeLegalizer::AnalyzeNewValue(SDValue &Val) { Val.setNode(AnalyzeNewNode(Val.getNode())); @@ -545,7 +544,7 @@ void DAGTypeLegalizer::AnalyzeNewValue(SDValue &Val) { RemapValue(Val); } -/// ExpungeNode - If N has a bogus mapping in ReplacedValues, eliminate it. +/// If N has a bogus mapping in ReplacedValues, eliminate it. /// This can occur when a node is deleted then reallocated as a new node - /// the mapping in ReplacedValues applies to the deleted node, not the new /// one. @@ -626,7 +625,7 @@ void DAGTypeLegalizer::ExpungeNode(SDNode *N) { ReplacedValues.erase(SDValue(N, i)); } -/// RemapValue - If the specified value was already legalized to another value, +/// If the specified value was already legalized to another value, /// replace it by that value. void DAGTypeLegalizer::RemapValue(SDValue &N) { DenseMap<SDValue, SDValue>::iterator I = ReplacedValues.find(N); @@ -643,8 +642,8 @@ void DAGTypeLegalizer::RemapValue(SDValue &N) { } namespace { - /// NodeUpdateListener - This class is a DAGUpdateListener that listens for - /// updates to nodes and recomputes their ready state. + /// This class is a DAGUpdateListener that listens for updates to nodes and + /// recomputes their ready state. class NodeUpdateListener : public SelectionDAG::DAGUpdateListener { DAGTypeLegalizer &DTL; SmallSetVector<SDNode*, 16> &NodesToAnalyze; @@ -689,9 +688,8 @@ namespace { } -/// ReplaceValueWith - The specified value was legalized to the specified other -/// value. Update the DAG and NodeIds replacing any uses of From to use To -/// instead. +/// The specified value was legalized to the specified other value. +/// Update the DAG and NodeIds replacing any uses of From to use To instead. void DAGTypeLegalizer::ReplaceValueWith(SDValue From, SDValue To) { assert(From.getNode() != To.getNode() && "Potential legalization loop!"); @@ -905,15 +903,14 @@ void DAGTypeLegalizer::SetWidenedVector(SDValue Op, SDValue Result) { // Utilities. //===----------------------------------------------------------------------===// -/// BitConvertToInteger - Convert to an integer of the same size. +/// Convert to an integer of the same size. SDValue DAGTypeLegalizer::BitConvertToInteger(SDValue Op) { unsigned BitWidth = Op.getValueType().getSizeInBits(); return DAG.getNode(ISD::BITCAST, SDLoc(Op), EVT::getIntegerVT(*DAG.getContext(), BitWidth), Op); } -/// BitConvertVectorToIntegerVector - Convert to a vector of integers of the -/// same size. +/// Convert to a vector of integers of the same size. SDValue DAGTypeLegalizer::BitConvertVectorToIntegerVector(SDValue Op) { assert(Op.getValueType().isVector() && "Only applies to vectors!"); unsigned EltWidth = Op.getValueType().getVectorElementType().getSizeInBits(); @@ -937,8 +934,8 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op, false, false, false, 0); } -/// CustomLowerNode - Replace the node's results with custom code provided -/// by the target and return "true", or do nothing and return "false". +/// Replace the node's results with custom code provided by the target and +/// return "true", or do nothing and return "false". /// The last parameter is FALSE if we are dealing with a node with legal /// result types and illegal operand. The second parameter denotes the type of /// illegal OperandNo in that case. @@ -981,8 +978,8 @@ bool DAGTypeLegalizer::CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult) { } -/// CustomWidenLowerNode - Widen the node's results with custom code provided -/// by the target and return "true", or do nothing and return "false". +/// Widen the node's results with custom code provided by the target and return +/// "true", or do nothing and return "false". bool DAGTypeLegalizer::CustomWidenLowerNode(SDNode *N, EVT VT) { // See if the target wants to custom lower this node. if (TLI.getOperationAction(N->getOpcode(), VT) != TargetLowering::Custom) @@ -992,7 +989,7 @@ bool DAGTypeLegalizer::CustomWidenLowerNode(SDNode *N, EVT VT) { TLI.ReplaceNodeResults(N, Results, DAG); if (Results.empty()) - // The target didn't want to custom widen lower its result after all. + // The target didn't want to custom widen lower its result after all. return false; // Update the widening map. @@ -1010,8 +1007,8 @@ SDValue DAGTypeLegalizer::DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) { return SDValue(N->getOperand(ResNo)); } -/// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and -/// high parts of the given value. +/// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the +/// given value. void DAGTypeLegalizer::GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi) { SDLoc dl(Pair); @@ -1038,7 +1035,7 @@ SDValue DAGTypeLegalizer::GetVectorElementPointer(SDValue VecPtr, EVT EltVT, return DAG.getNode(ISD::ADD, dl, Index.getValueType(), Index, VecPtr); } -/// JoinIntegers - Build an integer with low bits Lo and high bits Hi. +/// Build an integer with low bits Lo and high bits Hi. SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { // Arbitrarily use dlHi for result SDLoc SDLoc dlHi(Hi); @@ -1056,7 +1053,7 @@ SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { return DAG.getNode(ISD::OR, dlHi, NVT, Lo, Hi); } -/// LibCallify - Convert the node into a libcall with the same prototype. +/// Convert the node into a libcall with the same prototype. SDValue DAGTypeLegalizer::LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned) { unsigned NumOps = N->getNumOperands(); @@ -1080,12 +1077,11 @@ SDValue DAGTypeLegalizer::LibCallify(RTLIB::Libcall LC, SDNode *N, return TLI.makeLibCall(DAG, LC, N->getValueType(0), Ops, isSigned, dl).first; } -// ExpandChainLibCall - Expand a node into a call to a libcall. Similar to -// ExpandLibCall except that the first operand is the in-chain. +/// Expand a node into a call to a libcall. Similar to ExpandLibCall except that +/// the first operand is the in-chain. std::pair<SDValue, SDValue> -DAGTypeLegalizer::ExpandChainLibCall(RTLIB::Libcall LC, - SDNode *Node, - bool isSigned) { +DAGTypeLegalizer::ExpandChainLibCall(RTLIB::Libcall LC, SDNode *Node, + bool isSigned) { SDValue InChain = Node->getOperand(0); TargetLowering::ArgListTy Args; @@ -1114,9 +1110,9 @@ DAGTypeLegalizer::ExpandChainLibCall(RTLIB::Libcall LC, return CallInfo; } -/// PromoteTargetBoolean - Promote the given target boolean to a target boolean -/// of the given type. A target boolean is an integer value, not necessarily of -/// type i1, the bits of which conform to getBooleanContents. +/// Promote the given target boolean to a target boolean of the given type. +/// A target boolean is an integer value, not necessarily of type i1, the bits +/// of which conform to getBooleanContents. /// /// ValVT is the type of values that produced the boolean. SDValue DAGTypeLegalizer::PromoteTargetBoolean(SDValue Bool, EVT ValVT) { @@ -1127,9 +1123,9 @@ SDValue DAGTypeLegalizer::PromoteTargetBoolean(SDValue Bool, EVT ValVT) { return DAG.getNode(ExtendCode, dl, BoolVT, Bool); } -/// WidenTargetBoolean - Widen the given target boolean to a target boolean -/// of the given type. The boolean vector is widened and then promoted to match -/// the target boolean type of the given ValVT. +/// Widen the given target boolean to a target boolean of the given type. +/// The boolean vector is widened and then promoted to match the target boolean +/// type of the given ValVT. SDValue DAGTypeLegalizer::WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes) { SDLoc dl(Bool); @@ -1144,8 +1140,7 @@ SDValue DAGTypeLegalizer::WidenTargetBoolean(SDValue Bool, EVT ValVT, return PromoteTargetBoolean(Bool, ValVT); } -/// SplitInteger - Return the lower LoVT bits of Op in Lo and the upper HiVT -/// bits in Hi. +/// Return the lower LoVT bits of Op in Lo and the upper HiVT bits in Hi. void DAGTypeLegalizer::SplitInteger(SDValue Op, EVT LoVT, EVT HiVT, SDValue &Lo, SDValue &Hi) { @@ -1159,8 +1154,8 @@ void DAGTypeLegalizer::SplitInteger(SDValue Op, Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi); } -/// SplitInteger - Return the lower and upper halves of Op's bits in a value -/// type half the size of Op's. +/// Return the lower and upper halves of Op's bits in a value type half the +/// size of Op's. void DAGTypeLegalizer::SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi) { EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), @@ -1173,9 +1168,8 @@ void DAGTypeLegalizer::SplitInteger(SDValue Op, // Entry Point //===----------------------------------------------------------------------===// -/// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that -/// only uses types natively supported by the target. Returns "true" if it made -/// any changes. +/// This transforms the SelectionDAG into a SelectionDAG that only uses types +/// natively supported by the target. Returns "true" if it made any changes. /// /// Note that this is an involved process that may invalidate pointers into /// the graph. diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h index f1c5ca73330..84ad8f83d90 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -25,58 +25,56 @@ namespace llvm { //===----------------------------------------------------------------------===// -/// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks -/// on it until only value types the target machine can handle are left. This -/// involves promoting small sizes to large sizes or splitting up large values -/// into small values. +/// This takes an arbitrary SelectionDAG as input and hacks on it until only +/// value types the target machine can handle are left. This involves promoting +/// small sizes to large sizes or splitting up large values into small values. /// class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer { const TargetLowering &TLI; SelectionDAG &DAG; public: - // NodeIdFlags - This pass uses the NodeId on the SDNodes to hold information - // about the state of the node. The enum has all the values. + /// This pass uses the NodeId on the SDNodes to hold information about the + /// state of the node. The enum has all the values. enum NodeIdFlags { - /// ReadyToProcess - All operands have been processed, so this node is ready - /// to be handled. + /// All operands have been processed, so this node is ready to be handled. ReadyToProcess = 0, - /// NewNode - This is a new node, not before seen, that was created in the - /// process of legalizing some other node. + /// This is a new node, not before seen, that was created in the process of + /// legalizing some other node. NewNode = -1, - /// Unanalyzed - This node's ID needs to be set to the number of its - /// unprocessed operands. + /// This node's ID needs to be set to the number of its unprocessed + /// operands. Unanalyzed = -2, - /// Processed - This is a node that has already been processed. + /// This is a node that has already been processed. Processed = -3 // 1+ - This is a node which has this many unprocessed operands. }; private: - /// ValueTypeActions - This is a bitvector that contains two bits for each - /// simple value type, where the two bits correspond to the LegalizeAction - /// enum from TargetLowering. This can be queried with "getTypeAction(VT)". + /// This is a bitvector that contains two bits for each simple value type, + /// where the two bits correspond to the LegalizeAction enum from + /// TargetLowering. This can be queried with "getTypeAction(VT)". TargetLowering::ValueTypeActionImpl ValueTypeActions; - /// getTypeAction - Return how we should legalize values of this type. + /// Return how we should legalize values of this type. TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { return TLI.getTypeAction(*DAG.getContext(), VT); } - /// isTypeLegal - Return true if this type is legal on this target. + /// Return true if this type is legal on this target. bool isTypeLegal(EVT VT) const { return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal; } - /// isSimpleLegalType - Return true if this is a simple legal type. + /// Return true if this is a simple legal type. bool isSimpleLegalType(EVT VT) const { return VT.isSimple() && TLI.isTypeLegal(VT); } - /// isLegalInHWReg - Return true if this type can be passed in registers. + /// Return true if this type can be passed in registers. /// For example, x86_64's f128, should to be legally in registers /// and only some operations converted to library calls or integer /// bitwise operations. @@ -89,51 +87,49 @@ private: return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); } - /// IgnoreNodeResults - Pretend all of this node's results are legal. + /// Pretend all of this node's results are legal. bool IgnoreNodeResults(SDNode *N) const { return N->getOpcode() == ISD::TargetConstant; } - /// PromotedIntegers - For integer nodes that are below legal width, this map - /// indicates what promoted value to use. + /// For integer nodes that are below legal width, this map indicates what + /// promoted value to use. SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers; - /// ExpandedIntegers - For integer nodes that need to be expanded this map - /// indicates which operands are the expanded version of the input. + /// For integer nodes that need to be expanded this map indicates which + /// operands are the expanded version of the input. SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers; - /// SoftenedFloats - For floating point nodes converted to integers of - /// the same size, this map indicates the converted value to use. + /// For floating-point nodes converted to integers of the same size, this map + /// indicates the converted value to use. SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats; - /// PromotedFloats - For floating point nodes that have a smaller precision - /// than the smallest supported precision, this map indicates what promoted - /// value to use. + /// For floating-point nodes that have a smaller precision than the smallest + /// supported precision, this map indicates what promoted value to use. SmallDenseMap<SDValue, SDValue, 8> PromotedFloats; - /// ExpandedFloats - For float nodes that need to be expanded this map - /// indicates which operands are the expanded version of the input. + /// For float nodes that need to be expanded this map indicates which operands + /// are the expanded version of the input. SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats; - /// ScalarizedVectors - For nodes that are <1 x ty>, this map indicates the - /// scalar value of type 'ty' to use. + /// For nodes that are <1 x ty>, this map indicates the scalar value of type + /// 'ty' to use. SmallDenseMap<SDValue, SDValue, 8> ScalarizedVectors; - /// SplitVectors - For nodes that need to be split this map indicates - /// which operands are the expanded version of the input. + /// For nodes that need to be split this map indicates which operands are the + /// expanded version of the input. SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> SplitVectors; - /// WidenedVectors - For vector nodes that need to be widened, indicates - /// the widened value to use. + /// For vector nodes that need to be widened, indicates the widened value to + /// use. SmallDenseMap<SDValue, SDValue, 8> WidenedVectors; - /// ReplacedValues - For values that have been replaced with another, - /// indicates the replacement value to use. + /// For values that have been replaced with another, indicates the replacement + /// value to use. SmallDenseMap<SDValue, SDValue, 8> ReplacedValues; - /// Worklist - This defines a worklist of nodes to process. In order to be - /// pushed onto this worklist, all operands of a node must have already been - /// processed. + /// This defines a worklist of nodes to process. In order to be pushed onto + /// this worklist, all operands of a node must have already been processed. SmallVector<SDNode*, 128> Worklist; public: @@ -144,7 +140,7 @@ public: "Too many value types for ValueTypeActions to hold!"); } - /// run - This is the main entry point for the type legalizer. This does a + /// This is the main entry point for the type legalizer. This does a /// top-down traversal of the dag, legalizing types as it goes. Returns /// "true" if it made any changes. bool run(); @@ -172,9 +168,9 @@ private: bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); bool CustomWidenLowerNode(SDNode *N, EVT VT); - /// DisintegrateMERGE_VALUES - Replace each result of the given MERGE_VALUES - /// node with the corresponding input operand, except for the result 'ResNo', - /// for which the corresponding input operand is returned. + /// Replace each result of the given MERGE_VALUES node with the corresponding + /// input operand, except for the result 'ResNo', for which the corresponding + /// input operand is returned. SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo); SDValue GetVectorElementPointer(SDValue VecPtr, EVT EltVT, SDValue Index); @@ -200,9 +196,9 @@ private: // Integer Promotion Support: LegalizeIntegerTypes.cpp //===--------------------------------------------------------------------===// - /// GetPromotedInteger - Given a processed operand Op which was promoted to a - /// larger integer type, this returns the promoted value. The low bits of the - /// promoted value corresponding to the original type are exactly equal to Op. + /// Given a processed operand Op which was promoted to a larger integer type, + /// this returns the promoted value. The low bits of the promoted value + /// corresponding to the original type are exactly equal to Op. /// The extra bits contain rubbish, so the promoted value may need to be zero- /// or sign-extended from the original type before it is usable (the helpers /// SExtPromotedInteger and ZExtPromotedInteger can do this for you). @@ -217,8 +213,7 @@ private: } void SetPromotedInteger(SDValue Op, SDValue Result); - /// SExtPromotedInteger - Get a promoted operand and sign extend it to the - /// final size. + /// Get a promoted operand and sign extend it to the final size. SDValue SExtPromotedInteger(SDValue Op) { EVT OldVT = Op.getValueType(); SDLoc dl(Op); @@ -227,8 +222,7 @@ private: DAG.getValueType(OldVT)); } - /// ZExtPromotedInteger - Get a promoted operand and zero extend it to the - /// final size. + /// Get a promoted operand and zero extend it to the final size. SDValue ZExtPromotedInteger(SDValue Op) { EVT OldVT = Op.getValueType(); SDLoc dl(Op); @@ -321,9 +315,9 @@ private: // Integer Expansion Support: LegalizeIntegerTypes.cpp //===--------------------------------------------------------------------===// - /// GetExpandedInteger - Given a processed operand Op which was expanded into - /// two integers of half the size, this returns the two halves. The low bits - /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi. + /// Given a processed operand Op which was expanded into two integers of half + /// the size, this returns the two halves. The low bits of Op are exactly + /// equal to the bits of Lo; the high bits exactly equal Hi. /// For example, if Op is an i64 which was expanded into two i32's, then this /// method returns the two i32's, with Lo being equal to the lower 32 bits of /// Op, and Hi being equal to the upper 32 bits. @@ -395,8 +389,8 @@ private: // Float to Integer Conversion Support: LegalizeFloatTypes.cpp //===--------------------------------------------------------------------===// - /// GetSoftenedFloat - Given an operand Op of Float type, returns the integer - /// if the Op is not supported in target HW and converted to the integer. + /// Given an operand Op of Float type, returns the integer if the Op is not + /// supported in target HW and converted to the integer. /// The integer contains exactly the same bits as Op - only the type changed. /// For example, if Op is an f32 which was softened to an i32, then this method /// returns an i32, the bits of which coincide with those of Op. @@ -488,8 +482,8 @@ private: // Float Expansion Support: LegalizeFloatTypes.cpp //===--------------------------------------------------------------------===// - /// GetExpandedFloat - Given a processed operand Op which was expanded into - /// two floating point values of half the size, this returns the two halves. + /// Given a processed operand Op which was expanded into two floating-point + /// values of half the size, this returns the two halves. /// The low bits of Op are exactly equal to the bits of Lo; the high bits /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded /// into two f64's, then this method returns the two f64's, with Lo being @@ -586,9 +580,9 @@ private: // Scalarization Support: LegalizeVectorTypes.cpp //===--------------------------------------------------------------------===// - /// GetScalarizedVector - Given a processed one-element vector Op which was - /// scalarized to its element type, this returns the element. For example, - /// if Op is a v1i32, Op = < i32 val >, this method returns val, an i32. + /// Given a processed one-element vector Op which was scalarized to its + /// element type, this returns the element. For example, if Op is a v1i32, + /// Op = < i32 val >, this method returns val, an i32. SDValue GetScalarizedVector(SDValue Op) { SDValue &ScalarizedOp = ScalarizedVectors[Op]; RemapValue(ScalarizedOp); @@ -636,12 +630,12 @@ private: // Vector Splitting Support: LegalizeVectorTypes.cpp //===--------------------------------------------------------------------===// - /// GetSplitVector - Given a processed vector Op which was split into vectors - /// of half the size, this method returns the halves. The first elements of - /// Op coincide with the elements of Lo; the remaining elements of Op coincide - /// with the elements of Hi: Op is what you would get by concatenating Lo and - /// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then - /// this method returns the two v4i32's, with Lo corresponding to the first 4 + /// Given a processed vector Op which was split into vectors of half the size, + /// this method returns the halves. The first elements of Op coincide with the + /// elements of Lo; the remaining elements of Op coincide with the elements of + /// Hi: Op is what you would get by concatenating Lo and Hi. + /// For example, if Op is a v8i32 that was split into two v4i32's, then this + /// method returns the two v4i32's, with Lo corresponding to the first 4 /// elements of Op, and Hi to the last 4 elements. void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi); void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi); @@ -693,12 +687,12 @@ private: // Vector Widening Support: LegalizeVectorTypes.cpp //===--------------------------------------------------------------------===// - /// GetWidenedVector - Given a processed vector Op which was widened into a - /// larger vector, this method returns the larger vector. The elements of - /// the returned vector consist of the elements of Op followed by elements - /// containing rubbish. For example, if Op is a v2i32 that was widened to a - /// v4i32, then this method returns a v4i32 for which the first two elements - /// are the same as those of Op, while the last two elements contain rubbish. + /// Given a processed vector Op which was widened into a larger vector, this + /// method returns the larger vector. The elements of the returned vector + /// consist of the elements of Op followed by elements containing rubbish. + /// For example, if Op is a v2i32 that was widened to a v4i32, then this + /// method returns a v4i32 for which the first two elements are the same as + /// those of Op, while the last two elements contain rubbish. SDValue GetWidenedVector(SDValue Op) { SDValue &WidenedOp = WidenedVectors[Op]; RemapValue(WidenedOp); @@ -757,29 +751,29 @@ private: // Vector Widening Utilities Support: LegalizeVectorTypes.cpp //===--------------------------------------------------------------------===// - /// Helper GenWidenVectorLoads - Helper function to generate a set of - /// loads to load a vector with a resulting wider type. It takes + /// Helper function to generate a set of loads to load a vector with a + /// resulting wider type. It takes: /// LdChain: list of chains for the load to be generated. /// Ld: load to widen SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain, LoadSDNode *LD); - /// GenWidenVectorExtLoads - Helper function to generate a set of extension - /// loads to load a ector with a resulting wider type. It takes + /// Helper function to generate a set of extension loads to load a vector with + /// a resulting wider type. It takes: /// LdChain: list of chains for the load to be generated. /// Ld: load to widen /// ExtType: extension element type SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain, LoadSDNode *LD, ISD::LoadExtType ExtType); - /// Helper genWidenVectorStores - Helper function to generate a set of - /// stores to store a widen vector into non-widen memory + /// Helper function to generate a set of stores to store a widen vector into + /// non-widen memory. /// StChain: list of chains for the stores we have generated /// ST: store of a widen value void GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST); - /// Helper genWidenVectorTruncStores - Helper function to generate a set of - /// stores to store a truncate widen vector into non-widen memory + /// Helper function to generate a set of stores to store a truncate widen + /// vector into non-widen memory. /// StChain: list of chains for the stores we have generated /// ST: store of a widen value void GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain, @@ -787,8 +781,7 @@ private: /// Modifies a vector input (widen or narrows) to a vector of NVT. The /// input vector must have the same element type as NVT. - /// When FillWithZeroes is "on" the vector will be widened with - /// zeroes. + /// When FillWithZeroes is "on" the vector will be widened with zeroes. /// By default, the vector will be widened with undefined values. SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false); @@ -809,8 +802,8 @@ private: GetExpandedFloat(Op, Lo, Hi); } - /// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and - /// high parts of the given value. + /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the + /// given value. void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi); // Generic Result Splitting. diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index 77f9e4341e5..90db02a92b7 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -476,16 +476,16 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) { return false; } -/// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs -/// to be scalarized, it must be <1 x ty>. Convert the element instead. +/// If the value to convert is a vector that needs to be scalarized, it must be +/// <1 x ty>. Convert the element instead. SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) { SDValue Elt = GetScalarizedVector(N->getOperand(0)); return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0), Elt); } -/// ScalarizeVecOp_UnaryOp - If the input is a vector that needs to be -/// scalarized, it must be <1 x ty>. Do the operation on the element instead. +/// If the input is a vector that needs to be scalarized, it must be <1 x ty>. +/// Do the operation on the element instead. SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) { assert(N->getValueType(0).getVectorNumElements() == 1 && "Unexpected vector type!"); @@ -497,8 +497,7 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) { return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Op); } -/// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one - -/// use a BUILD_VECTOR instead. +/// The vectors to concatenate have length one - use a BUILD_VECTOR instead. SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) { SmallVector<SDValue, 8> Ops(N->getNumOperands()); for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) @@ -506,9 +505,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) { return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Ops); } -/// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to -/// be scalarized, it must be <1 x ty>, so just return the element, ignoring the -/// index. +/// If the input is a vector that needs to be scalarized, it must be <1 x ty>, +/// so just return the element, ignoring the index. SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { SDValue Res = GetScalarizedVector(N->getOperand(0)); if (Res.getValueType() != N->getValueType(0)) @@ -518,8 +516,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { } -/// ScalarizeVecOp_VSELECT - If the input condition is a vector that needs to be -/// scalarized, it must be <1 x i1>, so just convert to a normal ISD::SELECT +/// If the input condition is a vector that needs to be scalarized, it must be +/// <1 x i1>, so just convert to a normal ISD::SELECT /// (still with vector output type since that was acceptable if we got here). SDValue DAGTypeLegalizer::ScalarizeVecOp_VSELECT(SDNode *N) { SDValue ScalarCond = GetScalarizedVector(N->getOperand(0)); @@ -529,8 +527,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_VSELECT(SDNode *N) { N->getOperand(2)); } -/// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be -/// scalarized, it must be <1 x ty>. Just store the element. +/// If the value to store is a vector that needs to be scalarized, it must be +/// <1 x ty>. Just store the element. SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){ assert(N->isUnindexed() && "Indexed store of one-element vector?"); assert(OpNo == 1 && "Do not know how to scalarize this operand!"); @@ -550,8 +548,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){ N->getOriginalAlignment(), N->getAAInfo()); } -/// ScalarizeVecOp_FP_ROUND - If the value to round is a vector that needs -/// to be scalarized, it must be <1 x ty>. Convert the element instead. +/// If the value to round is a vector that needs to be scalarized, it must be +/// <1 x ty>. Convert the element instead. SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) { SDValue Elt = GetScalarizedVector(N->getOperand(0)); SDValue Res = DAG.getNode(ISD::FP_ROUND, SDLoc(N), @@ -564,11 +562,10 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) { // Result Vector Splitting //===----------------------------------------------------------------------===// -/// SplitVectorResult - This method is called when the specified result of the -/// specified node is found to need vector splitting. At this point, the node -/// may also have invalid operands or may have other results that need -/// legalization, we just know that (at least) one result needs vector -/// splitting. +/// This method is called when the specified result of the specified node is +/// found to need vector splitting. At this point, the node may also have +/// invalid operands or may have other results that need legalization, we just +/// know that (at least) one result needs vector splitting. void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) { DEBUG(dbgs() << "Split node result: "; N->dump(&DAG); @@ -1434,10 +1431,10 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, // Operand Vector Splitting //===----------------------------------------------------------------------===// -/// SplitVectorOperand - This method is called when the specified operand of the -/// specified node is found to need vector splitting. At this point, all of the -/// result types of the node are known to be legal, but other operands of the -/// node may need legalization as well as the specified one. +/// This method is called when the specified operand of the specified node is +/// found to need vector splitting. At this point, all of the result types of +/// the node are known to be legal, but other operands of the node may need +/// legalization as well as the specified one. bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) { DEBUG(dbgs() << "Split node operand: "; N->dump(&DAG); |