diff options
author | Artem Tamazov <artem.tamazov@amd.com> | 2016-07-11 12:07:18 +0000 |
---|---|---|
committer | Artem Tamazov <artem.tamazov@amd.com> | 2016-07-11 12:07:18 +0000 |
commit | 20ad7302fa33c1a1498504140159afb58b4e50f8 (patch) | |
tree | 85a3596c2f758898155bb5e0751229b0666129f3 | |
parent | 279cd1ed0bc42d2ccbb1d4ef8ecdd1c41b5e7a5e (diff) |
[AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.
Fixes issue mentioned at:
https://github.com/RadeonOpenCompute/LLVM-AMDGPU-Assembler-Extra/issues/13.
Lit tests added.
Differential Revision: http://reviews.llvm.org/D22133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275054 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 | ||||
-rw-r--r-- | test/MC/AMDGPU/labels-branch.s | 17 |
2 files changed, 19 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index cc3e02bcadd..efa57c87d09 100644 --- a/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -2782,6 +2782,8 @@ unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op, // name of the expression is not a valid token, the match will fail, // so we need to handle it here. return Operand.isSSrc32() ? Match_Success : Match_InvalidOperand; + case MCK_SoppBrTarget: + return Operand.isSoppBrTarget() ? Match_Success : Match_InvalidOperand; default: return Match_InvalidOperand; } } diff --git a/test/MC/AMDGPU/labels-branch.s b/test/MC/AMDGPU/labels-branch.s new file mode 100644 index 00000000000..da6450f1387 --- /dev/null +++ b/test/MC/AMDGPU/labels-branch.s @@ -0,0 +1,17 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI + +loop_start: +s_branch loop_start +// VI: s_branch loop_start ; encoding: [A,A,0x82,0xbf] +// VI-NEXT: ; fixup A - offset: 0, value: loop_start, kind: fixup_si_sopp_br + +s_branch loop_end +// VI: s_branch loop_end ; encoding: [A,A,0x82,0xbf] +// VI-NEXT: ; fixup A - offset: 0, value: loop_end, kind: fixup_si_sopp_br +loop_end: + +s_branch gds +// VI: s_branch gds ; encoding: [A,A,0x82,0xbf] +// VI-NEXT: ; fixup A - offset: 0, value: gds, kind: fixup_si_sopp_br +gds: + s_nop 0 |