diff options
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 2758622a5c2d..aade670cc836 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1740,8 +1740,8 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, * HW team confirmed that the time to reach phypowergood status is * anywhere between 50 us and 100us. */ - if (wait_for_us(((I915_READ(BXT_PORT_CL1CM_DW0(phy)) & - (PHY_RESERVED | PHY_POWER_GOOD)) == PHY_POWER_GOOD), 100)) { + if (wait_until_reg(BXT_PORT_CL1CM_DW0(phy), + (PHY_RESERVED | PHY_POWER_GOOD), PHY_POWER_GOOD, 1)) { DRM_ERROR("timeout during PHY%d power on\n", phy); } @@ -1810,8 +1810,8 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, * the corresponding calibrated value from PHY1, and disable * the automatic calibration on PHY0. */ - if (wait_for(I915_READ(BXT_PORT_REF_DW3(DPIO_PHY1)) & GRC_DONE, - 10)) + if (wait_until_reg_set(BXT_PORT_REF_DW3(DPIO_PHY1), GRC_DONE, + 10)) DRM_ERROR("timeout waiting for PHY1 GRC\n"); val = I915_READ(BXT_PORT_REF_DW6(DPIO_PHY1)); |