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authorMika Kuoppala <mika.kuoppala@linux.intel.com>2016-02-08 23:33:24 +0200
committerMika Kuoppala <mika.kuoppala@intel.com>2016-03-22 18:29:32 +0200
commit7e6c3f36563d133cff5b700d9c36b12ac2a0c643 (patch)
tree55c0404e17981fa251ca1c1a7eceb90358d4fe28
parent83ed25fa1b956275542da63eb98dc8fd2291329d (diff)
drm/i915/vlv: Take forcewake when changing rps thresholds
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 521cf4564329..d4f7f460f2f1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4466,9 +4466,11 @@ static void valleyview_set_rps(struct drm_device *dev, u8 val)
I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));
if (val != dev_priv->rps.cur_freq) {
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
if (!IS_CHERRYVIEW(dev_priv))
gen6_set_rps_thresholds(dev_priv, val);
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
}
dev_priv->rps.cur_freq = val;
@@ -4489,11 +4491,7 @@ static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
if (dev_priv->rps.cur_freq <= val)
return;
- /* Wake up the media well, as that takes a lot less
- * power than the Render well. */
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
valleyview_set_rps(dev_priv->dev, val);
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);
}
void gen6_rps_busy(struct drm_i915_private *dev_priv)