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2014-01-31i965: Drop need_workaround_flush flag; always do post-sync workaround.snbfixesKenneth Graunke4-22/+0
The need_workaround_flush flag was an attempt to avoid doing the post-sync non-zero workaround flush unless it was actually necessary. Getting the tracking right is tricky; we've messed it up several times. The cost of getting this wrong is high: almost certainly a GPU hang. The cost of always doing the flush is low: it's just another flush, and on Sandybridge, we're doing piles of them anyway. And every time we've added more post-sync non-zero workarounds, the system has become more stable. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-30dri3: Track current Present swap mode and adjust buffer countsKeith Packard2-24/+35
This automatically adjusts the number of buffers that we want based on what swapping mode the X server is using and the current swap interval: swap mode interval buffers copy > 0 1 copy 0 2 flip > 0 2 flip 0 3 Note that flip with swap interval 0 is currently limited to twice the underlying refresh rate because of how the kernel manages flipping. Moving from 3 to 4 buffers would help, but that seems ridiculous. v2: Just update num_back at the point that the values that change num_back change. This means we'll have the updated value at the point that the freeing of old going-to-be-unused backbuffers happens, which might not have been the case before (change by anholt, acked by keithp). Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-30dri3, i915, i965: Add __DRI_IMAGE_FOURCC_SARGB8888Keith Packard4-0/+8
The __DRIimage createImageFromFds function takes a fourcc code, but there was no fourcc code that match __DRI_IMAGE_FORMAT_SARGB8. This adds a define for that format, adds a translation in DRI3 from __DRI_IMAGE_FORMAT_SARGB8 to __DRI_IMAGE_FOURCC_SARGB8888 and then adds translations *back* to __IMAGE_FORMAT_SARGB8 in both the i915 and i965 drivers. I'll refrain from comments on whether I think having two separate sets of format defines in dri_interface.h is a good idea or not... Fixes piglit glx-tfp and glx-visuals-depth Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-30dri3: Flush XCB before blocking for special eventsKeith Packard1-0/+2
XCB doesn't flush the output buffer automatically, so we have to call xcb_flush ourselves before waiting. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-30dri3: Enable GLX_INTEL_swap_eventKeith Packard1-17/+1
Now that we're tracking SBC values correctly, and the X server has the ability to send the GLX swap events from a PresentPixmap request, enable this extension. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-30dri3: Fix dri3_wait_for_sbc to wait for completion of requested SBCKeith Packard1-16/+39
Eric figured out that glXWaitForSbcOML wanted to block until the requested SBC had been completed, which means to wait until the PresentCompleteNotify event for that SBC had been received. This replaces the simple sleep(1) loop (which was bogus) with a loop that just checks to see if we've seen the specified SBC value come back in a PresentCompleteNotify event yet. The change is a bit larger than that as I've broken out a piece of common code to wait for and process a single Present event for the target drawable. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-30dri3: Track full 64-bit SBC numbers, instead of just 32-bitsKeith Packard2-20/+30
Tracking the full 64-bit SBC values makes it clearer how those values are being used, and simplifies the wait_msc code. The only trick is in re-constructing the full 64-bit value from Present's 32-bit serial number that we use to pass the SBC value from request to event. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-31mesa: Add warning to _REV pack/unpack functions with incorrect behaviorMark Mueller2-1/+18
Signed-off-by: Mark Mueller <MarkKMueller@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-01-31r600g: Removed unnecessary positivity check for unsigned int variable.Siavash Eliasi1-1/+1
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-01-30st/dri: Allow creating OpenGL 3.3 core contextsMichel Dänzer1-1/+1
Enables OpenGL 3.3 piglit tests. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29build: Share the all-local rule for linking libraries into the build dirKristian Høgsberg8-42/+21
This consolidates how we link the libraries into the build directory. It works for lib_LTLIBRARIES but not custom shared libraries like DRI drivers or gallium state trackers which needs special casing (cf dri mega drivers, for example) Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-01-29loader: do not print the pci id during normal operationEmil Velikov1-1/+1
Spamming the pci id is not beneficial. Make sure it's printed only when needed. v2: Change severity to _LOADER_DEBUG, rather than removing the message. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-29loader: print WARNING and FATAL messages using the default loggerEmil Velikov1-1/+1
Lower values are used for more severe cases. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-29glsl: s/_NDEBUG/NDEBUG/Emil Velikov1-1/+1
The former symbol is never defined within mesa. Based on the code it seems that the original intent was to use NDEBUG. Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29dir-locals.el: Set indent-tabs-mode true for makefile-modeKristian Høgsberg1-0/+1
Makefiles need hard tabs, let's not make that harder than it needs to be. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-01-29mesa: Return after ScissorArrayv or ScissorIndexed detect a parameter errorCourtney Goeltzenleuchter1-0/+2
Fixes piglit arb_viewport_array-scissor-ignore. Signed-off-by: Courtney Goeltzenleuchter <courtney@LunarG.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jon Ashburn <jon@lunarg.com>
2014-01-29docs: Add GL_ARB_map_buffer_alignment status to GL3.txt and release notesIan Romanick2-1/+3
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29mesa: GL_ARB_map_buffer_alignment is not optionalSiavash Eliasi5-6/+2
Every driver supports it. All current and future Gallium drivers always support it, and all existing classic drivers support it. v2: Making GL_ARB_map_buffer_alignment a desktop OpenGL extension only. v3: Squash two commits together. v4 (idr): MIN_MAP_BUFFER_ALIGNMENT queries don't have any dependencies. In previous versions of the patch it depended on EXTRA_API_GL which would prevent the query from working in core profile contexts. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29nouveau: Use gl_constants::MinMapBufferAlignment as the alignment in ↵Siavash Eliasi1-1/+2
nouveau_bo_new This driver does not support GL_ARB_map_buffer_range, so no special treatment is needed for unaligned offsets in the mapping. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29radeon / r200: Use gl_constants::MinMapBufferAlignment as the alignment in ↵Siavash Eliasi1-1/+1
radeon_bo_open These drivers do not support GL_ARB_map_buffer_range, so no special treatment is needed for unaligned offsets in the mapping. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29mesa: Use _mesa_align_malloc in _mesa_buffer_dataSiavash Eliasi1-2/+5
v2: Fixed memory leak. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29mesa: Set gl_constants::MinMapBufferAlignment to 64 by defaultSiavash Eliasi1-1/+1
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29mesa/st: Unconditionally enable ARB_map_buffer_alignment.Siavash Eliasi1-3/+3
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29freedreno: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Ian Romanick1-0/+3
Allocations actually have page alignment, but 64 is still a reasonable value. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Rob Clark <robclark@freedesktop.org>
2014-01-29ilo: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi1-1/+1
Ian manually ran the map_buffer_range* tests and the arb_map_buffer_alignment-* tests, but he did not do a full piglit run. v2 (idr): Use 64 instead of 4096 Tested-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2014-01-29svga: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi1-1/+2
v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi1-1/+3
v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
2014-01-29i915g: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi1-1/+1
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi1-1/+2
v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29llvmpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi1-3/+3
v2: Changed allocation alignment of llvmpipe_displaytarget_layout. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi1-1/+2
v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-29softpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi1-2/+2
v2: Changed allocation alignment in softpipe_displaytarget_layout. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-28i915g: support more PIPE_CAPsStéphane Marchesin1-3/+6
2014-01-29radeonsi: Put GS ring buffer descriptors with streamout buffer descriptorsMichel Dänzer5-84/+115
And mark the constant buffers as read only for the GPU again. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Enable OpenGL 3.3Michel Dänzer2-21/+23
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Geometry shader micro-optimizationsMichel Dänzer1-12/+10
Move parameter loads out of loops, and use the instruction offset instead of a VGPR for the vertex attribute offset when writing to the ESGS ring buffer. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: We don't support indirect addressing of geometry shader inputsMichel Dänzer1-0/+4
Fixes piglit spec/glsl-1.50/execution/geometry/dynamic_input_array_index Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer6-34/+58
This makes sure constants and samplers work in the vertex shader even when a geometry shader is active. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Fix streamout from geometry shaderMichel Dänzer1-10/+27
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Simplify shader PM4 state handlingMichel Dänzer3-61/+21
Just always bind the current states before drawing. Besides the simplification, as a bonus this makes sure the VS hardware shader stage always uses the GS copy shader when a geometry shader is active, fixing a number of GS related piglit tests. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Properly match ES outputs to GS inputsMichel Dänzer1-5/+16
Fixes piglit vs-gs-arrays-within-blocks-pass. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Really dump TGSI code before any TGSI->LLVM conversion attemptMichel Dänzer1-8/+8
While we're at it, use the local variable 'sel'. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Also export clip distances with geometry shaderMichel Dänzer2-5/+9
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Take GS into account for VS state in more placesMichel Dänzer3-2/+14
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Handle adjacency primitivesMichel Dänzer1-4/+4
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Handle TGSI_SEMANTIC_PRIMIDMichel Dänzer3-2/+16
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Generalize counting of shader parametersMichel Dänzer3-38/+48
Now it covers ES->GS as well as VS->PS. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Fix handling of geometry shader output vertex IDMichel Dänzer1-7/+19
It needs to increment at shader runtime, not at shader compile time, as the geometry shader can emit vertices in loops. LLVM automagically converts the ID back to an immediate value if its value can be determined at compile time. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Initial geometry shader supportMichel Dänzer11-191/+1084
Partly based on the corresponding r600g work by Vadim Girlin and Dave Airlie. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-29radeonsi: Refactor shader input / output handling codeMichel Dänzer1-218/+268
In preparation for adding geometry shader support. Reviewed-by: Marek Olšák <marek.olsak@amd.com>