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authorEric Anholt <eric@anholt.net>2012-07-12 13:14:42 -0700
committerEric Anholt <eric@anholt.net>2012-08-12 19:08:25 -0700
commitb4da272a6ea58a7c81c71477d65d82651555709a (patch)
treed740d6804795671aa437bfbe1438afaa8bb81fff /src/mesa/drivers/dri
parent0e723b135bfd59868c92c3ae243f1adaedaec3a5 (diff)
i965: Add performance debug for fast clear fallbacks.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clear.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
index 05dd68b650..e56a26ae1e 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -107,14 +107,22 @@ brw_fast_clear_depth(struct gl_context *ctx)
* a previous clear had happened at a different clear value and resolve it
* first.
*/
- if (ctx->Scissor.Enabled)
+ if (ctx->Scissor.Enabled) {
+ perf_debug("Failed to fast clear depth due to scissor being enabled. "
+ "Possible 5%% performance win if avoided.\n");
return false;
+ }
/* The rendered area has to be 8x4 samples, not resolved pixels, so we look
* at the miptree slice dimensions instead of renderbuffer size.
*/
if (mt->level[depth_irb->mt_level].width % 8 != 0 ||
mt->level[depth_irb->mt_level].height % 4 != 0) {
+ perf_debug("Failed to fast clear depth due to width/height %d,%d not "
+ "being aligned to 8,4. Possible 5%% performance win if "
+ "avoided\n",
+ mt->level[depth_irb->mt_level].width,
+ mt->level[depth_irb->mt_level].height);
return false;
}