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authorKenneth Graunke <kenneth@whitecape.org>2015-09-30 15:42:54 -0700
committerKenneth Graunke <kenneth@whitecape.org>2015-11-04 10:18:56 -0800
commit6b35f4d8decec69c38e929856a9918486ff7cbf7 (patch)
tree0960d7b809e9c03cd629e701cd9a59a98a6a457d
parentb91449362f7aee056d5f6bce76b79f8ed8337d15 (diff)
i965: Add HS/DS surface support.
This is brw_gs_surface_state.c copy and pasted twice with search and replace. brw_binding_table.c code is similarly copy and pasted. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r--src/mesa/drivers/dri/i965/Makefile.sources2
-rw-r--r--src/mesa/drivers/dri/i965/brw_binding_tables.c54
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_ds_surface_state.c146
-rw-r--r--src/mesa/drivers/dri/i965/brw_hs_surface_state.c146
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h12
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c24
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c16
8 files changed, 403 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index 48b97c0bcb..abacb996cb 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -114,6 +114,7 @@ i965_FILES = \
brw_draw.c \
brw_draw.h \
brw_draw_upload.c \
+ brw_ds_surface_state.c \
brw_ff_gs.c \
brw_ff_gs_emit.c \
brw_ff_gs.h \
@@ -121,6 +122,7 @@ i965_FILES = \
brw_gs.h \
brw_gs_state.c \
brw_gs_surface_state.c \
+ brw_hs_surface_state.c \
brw_link.cpp \
brw_meta_fast_clear.c \
brw_meta_stencil_blit.c \
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 508f1f019a..b7342a2fa5 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -197,6 +197,60 @@ const struct brw_tracked_state brw_wm_binding_table = {
.emit = brw_upload_wm_binding_table,
};
+/** Upload the HS binding table (if HS is active). */
+static void
+brw_hs_upload_binding_table(struct brw_context *brw)
+{
+ /* If there's no HS, skip changing anything. */
+ if (brw->tess_ctrl_program == NULL)
+ return;
+
+ /* BRW_NEW_HS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->hs.base.prog_data;
+ brw_upload_binding_table(brw,
+ _3DSTATE_BINDING_TABLE_POINTERS_HS,
+ BRW_NEW_HS_BINDING_TABLE, prog_data,
+ &brw->hs.base);
+}
+
+const struct brw_tracked_state brw_hs_binding_table = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_HS_CONSTBUF |
+ BRW_NEW_HS_PROG_DATA |
+ BRW_NEW_SURFACES,
+ },
+ .emit = brw_hs_upload_binding_table,
+};
+
+/** Upload the DS binding table (if DS is active). */
+static void
+brw_ds_upload_binding_table(struct brw_context *brw)
+{
+ /* If there's no DS, skip changing anything. */
+ if (brw->tess_eval_program == NULL)
+ return;
+
+ /* BRW_NEW_DS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->ds.base.prog_data;
+ brw_upload_binding_table(brw,
+ _3DSTATE_BINDING_TABLE_POINTERS_DS,
+ BRW_NEW_DS_BINDING_TABLE, prog_data,
+ &brw->ds.base);
+}
+
+const struct brw_tracked_state brw_ds_binding_table = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_DS_CONSTBUF |
+ BRW_NEW_DS_PROG_DATA |
+ BRW_NEW_SURFACES,
+ },
+ .emit = brw_ds_upload_binding_table,
+};
+
/** Upload the GS binding table (if GS is active). */
static void
brw_gs_upload_binding_table(struct brw_context *brw)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index f4f74468cf..0f72ce9d1a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -204,6 +204,8 @@ enum brw_state_id {
BRW_STATE_BATCH,
BRW_STATE_INDEX_BUFFER,
BRW_STATE_VS_CONSTBUF,
+ BRW_STATE_HS_CONSTBUF,
+ BRW_STATE_DS_CONSTBUF,
BRW_STATE_GS_CONSTBUF,
BRW_STATE_PROGRAM_CACHE,
BRW_STATE_STATE_BASE_ADDRESS,
@@ -292,6 +294,8 @@ enum brw_state_id {
/** \see brw.state.depth_region */
#define BRW_NEW_INDEX_BUFFER (1ull << BRW_STATE_INDEX_BUFFER)
#define BRW_NEW_VS_CONSTBUF (1ull << BRW_STATE_VS_CONSTBUF)
+#define BRW_NEW_HS_CONSTBUF (1ull << BRW_STATE_HS_CONSTBUF)
+#define BRW_NEW_DS_CONSTBUF (1ull << BRW_STATE_DS_CONSTBUF)
#define BRW_NEW_GS_CONSTBUF (1ull << BRW_STATE_GS_CONSTBUF)
#define BRW_NEW_PROGRAM_CACHE (1ull << BRW_STATE_PROGRAM_CACHE)
#define BRW_NEW_STATE_BASE_ADDRESS (1ull << BRW_STATE_STATE_BASE_ADDRESS)
diff --git a/src/mesa/drivers/dri/i965/brw_ds_surface_state.c b/src/mesa/drivers/dri/i965/brw_ds_surface_state.c
new file mode 100644
index 0000000000..58b54c5a8c
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_ds_surface_state.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "main/mtypes.h"
+#include "program/prog_parameter.h"
+
+#include "brw_context.h"
+#include "brw_state.h"
+
+
+/* Creates a new DS constant buffer reflecting the current DS program's
+ * constants, if needed by the DS program.
+ *
+ * Otherwise, constants go through the CURBEs using the brw_constant_buffer
+ * state atom.
+ */
+static void
+brw_upload_ds_pull_constants(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->ds.base;
+
+ /* BRW_NEW_TESS_EVAL_PROGRAM */
+ struct brw_tess_eval_program *dp =
+ (struct brw_tess_eval_program *) brw->tess_eval_program;
+
+ if (!dp)
+ return;
+
+ /* BRW_NEW_DS_PROG_DATA */
+ const struct brw_vue_prog_data *prog_data = &brw->ds.prog_data->base;
+ const bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
+
+ /* _NEW_PROGRAM_CONSTANTS */
+ brw_upload_pull_constants(brw, BRW_NEW_DS_CONSTBUF, &dp->program.Base,
+ stage_state, &prog_data->base, dword_pitch);
+}
+
+const struct brw_tracked_state brw_ds_pull_constants = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_DS_PROG_DATA |
+ BRW_NEW_TESS_EVAL_PROGRAM,
+ },
+ .emit = brw_upload_ds_pull_constants,
+};
+
+static void
+brw_upload_ds_ubo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
+
+ if (!prog)
+ return;
+
+ /* BRW_NEW_DS_PROG_DATA */
+ struct brw_vue_prog_data *prog_data = &brw->ds.prog_data->base;
+ bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
+
+ brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL],
+ &brw->ds.base, &prog_data->base, dword_pitch);
+}
+
+const struct brw_tracked_state brw_ds_ubo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_DS_PROG_DATA |
+ BRW_NEW_UNIFORM_BUFFER,
+ },
+ .emit = brw_upload_ds_ubo_surfaces,
+};
+
+static void
+brw_upload_ds_abo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
+
+ if (prog) {
+ /* BRW_NEW_DS_PROG_DATA */
+ brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL],
+ &brw->ds.base, &brw->ds.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_ds_abo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_ATOMIC_BUFFER |
+ BRW_NEW_BATCH |
+ BRW_NEW_DS_PROG_DATA,
+ },
+ .emit = brw_upload_ds_abo_surfaces,
+};
+
+static void
+brw_upload_ds_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* BRW_NEW_TESS_EVAL_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL];
+
+ if (prog) {
+ /* BRW_NEW_DS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL],
+ &brw->ds.base, &brw->ds.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_ds_image_surfaces = {
+ .dirty = {
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_DS_PROG_DATA |
+ BRW_NEW_IMAGE_UNITS |
+ BRW_NEW_TESS_EVAL_PROGRAM,
+ },
+ .emit = brw_upload_ds_image_surfaces,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_hs_surface_state.c b/src/mesa/drivers/dri/i965/brw_hs_surface_state.c
new file mode 100644
index 0000000000..a67f70e7a0
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_hs_surface_state.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "main/mtypes.h"
+#include "program/prog_parameter.h"
+
+#include "brw_context.h"
+#include "brw_state.h"
+
+
+/* Creates a new HS constant buffer reflecting the current HS program's
+ * constants, if needed by the HS program.
+ *
+ * Otherwise, constants go through the CURBEs using the brw_constant_buffer
+ * state atom.
+ */
+static void
+brw_upload_hs_pull_constants(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->hs.base;
+
+ /* BRW_NEW_TESS_CTRL_PROGRAM */
+ struct brw_tess_ctrl_program *hp =
+ (struct brw_tess_ctrl_program *) brw->tess_ctrl_program;
+
+ if (!hp)
+ return;
+
+ /* BRW_NEW_HS_PROG_DATA */
+ const struct brw_vue_prog_data *prog_data = &brw->hs.prog_data->base;
+ const bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
+
+ /* _NEW_PROGRAM_CONSTANTS */
+ brw_upload_pull_constants(brw, BRW_NEW_HS_CONSTBUF, &hp->program.Base,
+ stage_state, &prog_data->base, dword_pitch);
+}
+
+const struct brw_tracked_state brw_hs_pull_constants = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_HS_PROG_DATA |
+ BRW_NEW_TESS_CTRL_PROGRAM,
+ },
+ .emit = brw_upload_hs_pull_constants,
+};
+
+static void
+brw_upload_hs_ubo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
+
+ if (!prog)
+ return;
+
+ /* BRW_NEW_HS_PROG_DATA */
+ struct brw_vue_prog_data *prog_data = &brw->hs.prog_data->base;
+ bool dword_pitch = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8;
+
+ brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL],
+ &brw->hs.base, &prog_data->base, dword_pitch);
+}
+
+const struct brw_tracked_state brw_hs_ubo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_HS_PROG_DATA |
+ BRW_NEW_UNIFORM_BUFFER,
+ },
+ .emit = brw_upload_hs_ubo_surfaces,
+};
+
+static void
+brw_upload_hs_abo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
+
+ if (prog) {
+ /* BRW_NEW_HS_PROG_DATA */
+ brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL],
+ &brw->hs.base, &brw->hs.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_hs_abo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_ATOMIC_BUFFER |
+ BRW_NEW_BATCH |
+ BRW_NEW_HS_PROG_DATA,
+ },
+ .emit = brw_upload_hs_abo_surfaces,
+};
+
+static void
+brw_upload_hs_image_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ /* BRW_NEW_TESS_CTRL_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
+
+ if (prog) {
+ /* BRW_NEW_HS_PROG_DATA, BRW_NEW_IMAGE_UNITS */
+ brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL],
+ &brw->hs.base, &brw->hs.prog_data->base.base);
+ }
+}
+
+const struct brw_tracked_state brw_hs_image_surfaces = {
+ .dirty = {
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_HS_PROG_DATA |
+ BRW_NEW_IMAGE_UNITS |
+ BRW_NEW_TESS_CTRL_PROGRAM,
+ },
+ .emit = brw_upload_hs_image_surfaces,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index e49e2cfc8a..657f47fe68 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -47,6 +47,8 @@ extern const struct brw_tracked_state brw_cc_unit;
extern const struct brw_tracked_state brw_clip_prog;
extern const struct brw_tracked_state brw_clip_unit;
extern const struct brw_tracked_state brw_vs_pull_constants;
+extern const struct brw_tracked_state brw_hs_pull_constants;
+extern const struct brw_tracked_state brw_ds_pull_constants;
extern const struct brw_tracked_state brw_gs_pull_constants;
extern const struct brw_tracked_state brw_wm_pull_constants;
extern const struct brw_tracked_state brw_cs_pull_constants;
@@ -74,16 +76,26 @@ extern const struct brw_tracked_state brw_gs_samplers;
extern const struct brw_tracked_state brw_vs_ubo_surfaces;
extern const struct brw_tracked_state brw_vs_abo_surfaces;
extern const struct brw_tracked_state brw_vs_image_surfaces;
+extern const struct brw_tracked_state brw_ds_ubo_surfaces;
+extern const struct brw_tracked_state brw_ds_abo_surfaces;
+extern const struct brw_tracked_state brw_ds_image_surfaces;
extern const struct brw_tracked_state brw_gs_ubo_surfaces;
extern const struct brw_tracked_state brw_gs_abo_surfaces;
extern const struct brw_tracked_state brw_gs_image_surfaces;
+extern const struct brw_tracked_state brw_hs_ubo_surfaces;
+extern const struct brw_tracked_state brw_hs_abo_surfaces;
+extern const struct brw_tracked_state brw_hs_image_surfaces;
extern const struct brw_tracked_state brw_vs_unit;
+extern const struct brw_tracked_state brw_hs_prog;
+extern const struct brw_tracked_state brw_ds_prog;
extern const struct brw_tracked_state brw_gs_prog;
extern const struct brw_tracked_state brw_wm_prog;
extern const struct brw_tracked_state brw_renderbuffer_surfaces;
extern const struct brw_tracked_state brw_texture_surfaces;
extern const struct brw_tracked_state brw_wm_binding_table;
extern const struct brw_tracked_state brw_gs_binding_table;
+extern const struct brw_tracked_state brw_ds_binding_table;
+extern const struct brw_tracked_state brw_hs_binding_table;
extern const struct brw_tracked_state brw_vs_binding_table;
extern const struct brw_tracked_state brw_wm_ubo_surfaces;
extern const struct brw_tracked_state brw_wm_abo_surfaces;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index b0406d2fe7..b61a81a682 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -195,6 +195,8 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
&gen7_hw_binding_tables, /* Enable hw-generated binding tables for Haswell */
&brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
+ &brw_hs_image_surfaces, /* Before gs push/pull constants and binding table */
+ &brw_ds_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
@@ -208,6 +210,12 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
&brw_vs_pull_constants,
&brw_vs_ubo_surfaces,
&brw_vs_abo_surfaces,
+ &brw_hs_pull_constants,
+ &brw_hs_ubo_surfaces,
+ &brw_hs_abo_surfaces,
+ &brw_ds_pull_constants,
+ &brw_ds_ubo_surfaces,
+ &brw_ds_abo_surfaces,
&brw_gs_pull_constants,
&brw_gs_ubo_surfaces,
&brw_gs_abo_surfaces,
@@ -217,10 +225,12 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
&gen6_renderbuffer_surfaces,
&brw_texture_surfaces,
&brw_vs_binding_table,
+ &brw_hs_binding_table,
+ &brw_ds_binding_table,
&brw_gs_binding_table,
&brw_wm_binding_table,
- &brw_fs_samplers,
+ &brw_fs_samplers, /* Is there a reason this goes first? */
&brw_vs_samplers,
&brw_gs_samplers,
&gen6_multisample_state,
@@ -285,6 +295,8 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
&gen7_hw_binding_tables, /* Enable hw-generated binding tables for Broadwell */
&brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
+ &brw_hs_image_surfaces, /* Before gs push/pull constants and binding table */
+ &brw_ds_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
@@ -298,6 +310,12 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
&brw_vs_pull_constants,
&brw_vs_ubo_surfaces,
&brw_vs_abo_surfaces,
+ &brw_hs_pull_constants,
+ &brw_hs_ubo_surfaces,
+ &brw_hs_abo_surfaces,
+ &brw_ds_pull_constants,
+ &brw_ds_ubo_surfaces,
+ &brw_ds_abo_surfaces,
&brw_gs_pull_constants,
&brw_gs_ubo_surfaces,
&brw_gs_abo_surfaces,
@@ -307,6 +325,8 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
&gen6_renderbuffer_surfaces,
&brw_texture_surfaces,
&brw_vs_binding_table,
+ &brw_hs_binding_table,
+ &brw_ds_binding_table,
&brw_gs_binding_table,
&brw_wm_binding_table,
@@ -608,6 +628,8 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_BATCH),
DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_HS_CONSTBUF),
+ DEFINE_BIT(BRW_NEW_DS_CONSTBUF),
DEFINE_BIT(BRW_NEW_GS_CONSTBUF),
DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_STATE_BASE_ADDRESS),
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index f88f8d5919..4638727b78 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -866,6 +866,12 @@ brw_update_texture_surfaces(struct brw_context *brw)
/* BRW_NEW_VERTEX_PROGRAM */
struct gl_program *vs = (struct gl_program *) brw->vertex_program;
+ /* BRW_NEW_TESS_CTRL_PROGRAM */
+ struct gl_program *hs = (struct gl_program *) brw->tess_ctrl_program;
+
+ /* BRW_NEW_TESS_EVAL_PROGRAM */
+ struct gl_program *ds = (struct gl_program *) brw->tess_eval_program;
+
/* BRW_NEW_GEOMETRY_PROGRAM */
struct gl_program *gs = (struct gl_program *) brw->geometry_program;
@@ -877,6 +883,8 @@ brw_update_texture_surfaces(struct brw_context *brw)
/* _NEW_TEXTURE */
update_stage_texture_surfaces(brw, vs, &brw->vs.base, false);
+ update_stage_texture_surfaces(brw, hs, &brw->hs.base, false);
+ update_stage_texture_surfaces(brw, ds, &brw->ds.base, false);
update_stage_texture_surfaces(brw, gs, &brw->gs.base, false);
update_stage_texture_surfaces(brw, fs, &brw->wm.base, false);
update_stage_texture_surfaces(brw, cs, &brw->cs.base, false);
@@ -887,6 +895,10 @@ brw_update_texture_surfaces(struct brw_context *brw)
if (brw->gen < 8) {
if (vs && vs->UsesGather)
update_stage_texture_surfaces(brw, vs, &brw->vs.base, true);
+ if (hs && hs->UsesGather)
+ update_stage_texture_surfaces(brw, hs, &brw->hs.base, true);
+ if (ds && ds->UsesGather)
+ update_stage_texture_surfaces(brw, ds, &brw->ds.base, true);
if (gs && gs->UsesGather)
update_stage_texture_surfaces(brw, gs, &brw->gs.base, true);
if (fs && fs->UsesGather)
@@ -903,10 +915,14 @@ const struct brw_tracked_state brw_texture_surfaces = {
.mesa = _NEW_TEXTURE,
.brw = BRW_NEW_BATCH |
BRW_NEW_COMPUTE_PROGRAM |
+ BRW_NEW_DS_PROG_DATA |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_FS_PROG_DATA |
BRW_NEW_GEOMETRY_PROGRAM |
BRW_NEW_GS_PROG_DATA |
+ BRW_NEW_HS_PROG_DATA |
+ BRW_NEW_TESS_CTRL_PROGRAM |
+ BRW_NEW_TESS_EVAL_PROGRAM |
BRW_NEW_TEXTURE_BUFFER |
BRW_NEW_VERTEX_PROGRAM |
BRW_NEW_VS_PROG_DATA,