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authorGareth Hughes <gareth@users.sourceforge.net>2000-12-17 15:32:33 +0000
committerGareth Hughes <gareth@users.sourceforge.net>2000-12-17 15:32:33 +0000
commit7630a6397c91ec8aada99c4289c9566505553b07 (patch)
treeb4af4dd1fdf6752e3da3f8c9e50dcd4c32e12cd4
parenta4163e47fd4997dc1278f0b9f8f7003fcedd8eef (diff)
Hardware accelerated rendering for the Rage Pro.
Client-side PIO with texturing, enough to play Q3A 'Fastest'. Multitexture not working correctly at this stage, no lines or points, bits of state missing etc. Should run most of the Mesa demos. I will make a full post to dri-devel regarding the current state of the driver, so please see that for more information.
-rw-r--r--linux-core/mach64_drv.c2
-rw-r--r--linux/mach64_dma.c15
-rw-r--r--linux/mach64_drm.h97
-rw-r--r--linux/mach64_drv.c2
-rw-r--r--linux/mach64_drv.h5
-rw-r--r--linux/mach64_state.c10
6 files changed, 86 insertions, 45 deletions
diff --git a/linux-core/mach64_drv.c b/linux-core/mach64_drv.c
index 688fb28be..2675128d2 100644
--- a/linux-core/mach64_drv.c
+++ b/linux-core/mach64_drv.c
@@ -35,7 +35,7 @@
#define DRIVER_NAME "mach64"
#define DRIVER_DESC "DRM module for the ATI Rage Pro"
-#define DRIVER_DATE "20001213"
+#define DRIVER_DATE "20001218"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0
diff --git a/linux/mach64_dma.c b/linux/mach64_dma.c
index 7288955bb..849b26784 100644
--- a/linux/mach64_dma.c
+++ b/linux/mach64_dma.c
@@ -58,8 +58,7 @@
* Engine control
*/
-static int mach64_do_wait_for_fifo( drm_mach64_private_t *dev_priv,
- int entries )
+int mach64_do_wait_for_fifo( drm_mach64_private_t *dev_priv, int entries )
{
int i;
@@ -115,12 +114,12 @@ static int mach64_do_dma_init( drm_device_t *dev, drm_mach64_init_t *init )
dev_priv->depth_offset = init->depth_offset;
dev_priv->depth_pitch = init->depth_pitch;
- dev_priv->front_offset_pitch = (((dev_priv->front_pitch/8) << 22) |
- (dev_priv->front_offset >> 3));
- dev_priv->back_offset_pitch = (((dev_priv->back_pitch/8) << 22) |
- (dev_priv->back_offset >> 3));
- dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch/8) << 22) |
- (dev_priv->depth_offset >> 3));
+ dev_priv->front_offset_pitch = (((dev_priv->front_pitch/8) << 22) |
+ (dev_priv->front_offset >> 3));
+ dev_priv->back_offset_pitch = (((dev_priv->back_pitch/8) << 22) |
+ (dev_priv->back_offset >> 3));
+ dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch/8) << 22) |
+ (dev_priv->depth_offset >> 3));
dev_priv->usec_timeout = 1000000;
diff --git a/linux/mach64_drm.h b/linux/mach64_drm.h
index 1f1c0b6e2..8a83dbf68 100644
--- a/linux/mach64_drm.h
+++ b/linux/mach64_drm.h
@@ -37,19 +37,25 @@
#define __MACH64_DEFINES__
/* What needs to be changed for the current vertex buffer?
+ * GH: We're going to be pedantic about this. We want the card to do as
+ * little as possible, so let's avoid having it fetch a whole bunch of
+ * register values that don't change all that often, if at all.
*/
-#define MACH64_UPLOAD_CONTEXT 0x001
-#define MACH64_UPLOAD_SETUP 0x002
-#define MACH64_UPLOAD_TEX0 0x004
-#define MACH64_UPLOAD_TEX1 0x008
-#define MACH64_UPLOAD_TEX0IMAGES 0x010
-#define MACH64_UPLOAD_TEX1IMAGES 0x020
-#define MACH64_UPLOAD_CORE 0x040
-#define MACH64_UPLOAD_MASKS 0x080
-#define MACH64_UPLOAD_WINDOW 0x100
-#define MACH64_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
-#define MACH64_REQUIRE_QUIESCENCE 0x400
-#define MACH64_UPLOAD_ALL 0x7ff
+#define MACH64_UPLOAD_DST_OFF_PITCH 0x0001
+#define MACH64_UPLOAD_Z_OFF_PITCH 0x0002
+#define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004
+#define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008
+#define MACH64_UPLOAD_DP_FOG_CLR 0x0010
+#define MACH64_UPLOAD_DP_WRITE_MASK 0x0020
+#define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040
+#define MACH64_UPLOAD_SETUP_CNTL 0x0080
+#define MACH64_UPLOAD_TEXTURE 0x0100
+#define MACH64_UPLOAD_MISC 0x0200
+#define MACH64_UPLOAD_TEX0IMAGE 0x0400
+#define MACH64_UPLOAD_TEX1IMAGE 0x0800
+#define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */
+#define MACH64_UPLOAD_CONTEXT 0x00ff
+#define MACH64_UPLOAD_ALL 0x1fff
#define MACH64_FRONT 0x1
#define MACH64_BACK 0x2
@@ -68,28 +74,38 @@
#define MACH64_NR_TEX_REGIONS 64
#define MACH64_LOG_TEX_GRANULARITY 16
+#define MACH64_TEX_MAXLEVELS 0
+
#endif /* __MACH64_SAREA_DEFINES__ */
-typedef struct drm_mach64_init {
- enum {
- MACH64_INIT_DMA = 0x01,
- MACH64_CLEANUP_DMA = 0x02
- } func;
+typedef struct {
+ unsigned int dst_off_pitch;
- unsigned int sarea_priv_offset;
+ unsigned int z_off_pitch;
+ unsigned int z_cntl;
+ unsigned int alpha_tst_cntl;
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
+ unsigned int scale_3d_cntl;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
- unsigned int span_offset;
+ unsigned int sc_left_right;
+ unsigned int sc_top_bottom;
- unsigned int fb_offset;
- unsigned int mmio_offset;
-} drm_mach64_init_t;
+ unsigned int dp_fog_clr;
+ unsigned int dp_write_mask;
+ unsigned int dp_pix_width;
+ unsigned int dp_mix;
+ unsigned int dp_src;
+ unsigned int clr_cmp_cntl;
+ unsigned int gui_traj_cntl;
+
+ unsigned int setup_cntl;
+
+ unsigned int tex_size_pitch;
+ unsigned int tex_cntl;
+ unsigned int secondary_tex_off;
+ unsigned int tex_offset;
+} drm_mach64_context_regs_t;
typedef struct drm_mach64_tex_region {
unsigned char next, prev;
@@ -101,8 +117,9 @@ typedef struct drm_mach64_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex dma buffer.
*/
-
- /* FIXME: fill this in... */
+ drm_mach64_context_regs_t context_state;
+ unsigned int dirty;
+ unsigned int vertsize;
/* The current cliprects, or a subset thereof.
*/
@@ -122,6 +139,28 @@ typedef struct drm_mach64_sarea {
int ctx_owner;
} drm_mach64_sarea_t;
+
+
+typedef struct drm_mach64_init {
+ enum {
+ MACH64_INIT_DMA = 0x01,
+ MACH64_CLEANUP_DMA = 0x02
+ } func;
+
+ unsigned int sarea_priv_offset;
+
+ unsigned int fb_bpp;
+ unsigned int front_offset, front_pitch;
+ unsigned int back_offset, back_pitch;
+
+ unsigned int depth_bpp;
+ unsigned int depth_offset, depth_pitch;
+ unsigned int span_offset;
+
+ unsigned int fb_offset;
+ unsigned int mmio_offset;
+} drm_mach64_init_t;
+
typedef struct drm_mach64_clear {
unsigned int flags;
int x, y, w, h;
diff --git a/linux/mach64_drv.c b/linux/mach64_drv.c
index 688fb28be..2675128d2 100644
--- a/linux/mach64_drv.c
+++ b/linux/mach64_drv.c
@@ -35,7 +35,7 @@
#define DRIVER_NAME "mach64"
#define DRIVER_DESC "DRM module for the ATI Rage Pro"
-#define DRIVER_DATE "20001213"
+#define DRIVER_DATE "20001218"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0
diff --git a/linux/mach64_drv.h b/linux/mach64_drv.h
index 0349a44ce..913b9cf4d 100644
--- a/linux/mach64_drv.h
+++ b/linux/mach64_drv.h
@@ -45,6 +45,8 @@ typedef struct drm_mach64_private {
int usec_timeout;
+ u32 *buffers;
+
drm_map_t *sarea;
drm_map_t *fb;
drm_map_t *mmio;
@@ -98,6 +100,9 @@ extern int mach64_dma_init( struct inode *inode, struct file *filp,
extern int mach64_dma_idle( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
+extern int mach64_do_wait_for_fifo( drm_mach64_private_t *dev_priv,
+ int entries );
+
/* r128_state.c */
extern int mach64_dma_clear( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
diff --git a/linux/mach64_state.c b/linux/mach64_state.c
index e3b7758af..efaecfe64 100644
--- a/linux/mach64_state.c
+++ b/linux/mach64_state.c
@@ -38,6 +38,7 @@
static void mach64_print_dirty( const char *msg, unsigned int flags )
{
+#if 0
DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
msg,
flags,
@@ -50,6 +51,7 @@ static void mach64_print_dirty( const char *msg, unsigned int flags )
(flags & MACH64_UPLOAD_WINDOW) ? "window, " : "",
(flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
(flags & MACH64_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
+#endif
}
static void mach64_dma_dispatch_clear( drm_device_t *dev,
@@ -312,12 +314,10 @@ int mach64_dma_clear( struct inode *inode, struct file *filp,
clear.x, clear.y, clear.w, clear.h,
clear.clear_color, clear.clear_depth );
-#if 0
/* Make sure we restore the 3D state next time.
*/
dev_priv->sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
- MACH64_UPLOAD_MASKS);
-#endif
+ MACH64_UPLOAD_MISC);
return 0;
}
@@ -341,11 +341,9 @@ int mach64_dma_swap( struct inode *inode, struct file *filp,
mach64_dma_dispatch_swap( dev );
-#if 0
/* Make sure we restore the 3D state next time.
*/
dev_priv->sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
- MACH64_UPLOAD_MASKS);
-#endif
+ MACH64_UPLOAD_MISC);
return 0;
}