diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h index 2fd00e45395c..29ff470086e5 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h @@ -116,13 +116,12 @@ struct dce_disp_clk { * This is basically "Crystal Frequency In KHz" (XTALIN) frequency */ int dfs_bypass_disp_clk; - /* Flag for Enabled SS on GPU PLL */ - bool ss_on_gpu_pll; - /* GPU PLL SS percentage (if down-spread enabled) */ - int gpu_pll_ss_percentage; - /* GPU PLL SS percentage Divider (100 or 1000) */ - int gpu_pll_ss_divider; - + /* Flag for Enabled SS on DPREFCLK */ + bool ss_on_dprefclk; + /* DPREFCLK SS percentage (if down-spread enabled) */ + int dprefclk_ss_percentage; + /* DPREFCLK SS percentage Divider (100 or 1000) */ + int dprefclk_ss_divider; /* max disp_clk from PPLIB for max validation display clock*/ int max_displ_clk_in_khz; |