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2011-09-15OMAP3+: voltage: convert to PRM register access functionsKevin Hilman12-111/+79
Convert VC/VP register access to use PRM VC/VP accessor functions. In the process, move the read/write function pointers from vdd_info into struct voltagedomain. No functional changes. Additional cleanup: - remove prm_mod field from VC/VP data structures, the PRM register access functions know which PRM module to use. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: PRM: add register access functions for VC/VPKevin Hilman4-1/+54
On OMAP3+, the voltage controller (VC) and voltage processor (VP) are inside the PRM. Add some PRM helper functions for register access to these module registers. Thanks to Nishanth Menon for finding/fixing a sparse problem. Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP3+ VP: replace transaction done check/clear with VP opsKevin Hilman4-24/+5
Replace the VP tranxdone check/clear with helper functions from the PRM layer. In the process, remove prm_irqst_* voltage structure fields for IRQ status checking which are no longer needed. Since these reads/writes of the IRQ status bits were the only PRM accesses that were not to VC/VP registers, this allows the rest of the register accesses in the VC/VP code to use VC/VP specific register access functions (done in the following patch.) Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: add PRM VP functions for checking/clearing VP TX done statusKevin Hilman7-39/+137
Add SoC specific PRM VP helper functions for checking and clearing the VP transaction done status. Longer term, these events should be handled by the forthcoming PRCM interrupt handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: VC: support PMICs with separate voltage and command registersKevin Hilman3-8/+11
The VC layer can support PMICs with separate voltage and command registers by putting the different registers in the PRM_VC_SMPS_VOL_RA and PRCM_VC_SMPS_CMD_RA registers respectively. The PMIC data must supply at least a voltage register address (volt_reg_addr). The command register address (cmd_reg_addr) is optional. If the PMIC data does not supply a separate command register address, the VC will use the voltage register address for both. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: split out voltage processor (VP) code into new layerKevin Hilman5-349/+387
This patch is primarily a move of VP specific code from voltage.c into its own code in vp.c and adds prototypes to vp.h No functional changes, except debugfs... VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_' prefixes removed from all debugfs filenames. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: enable VC bypass scale method when VC is initializedKevin Hilman1-1/+3
VC is initialized first, set default scaling method to VC bypass. If/when VP is initialized, default scaling method will be changed to VP force-update. Enabling VC bypass as default as soon as VC is initialized allows for VC bypass scaling to work when no VP is configured/initialized for a given voltage domain. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: move VC into struct voltagedomain, misc. renamesKevin Hilman8-81/+81
Move the VC instance struct from omap_vdd_info into struct voltagedomain. While moving, perform some misc. renames for readability. No functional changes. Summary of renames: - rename omap_vc_instance to omap_vc_channel, since there is only one instance of the VC IP and this actually represents channels using TRM terminology. - rename 'vc_common' field of VC channel which led to: s/vc->vc_common/vc->common/ - remove redundant '_data' suffix - OMAP3: vc1 --> vc_mpu, vc2 --> vc_core - omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() Signed-off-by: Kevin Hilman <khilman@ti.com> merge
2011-09-15OMAP2+: voltage: split voltage controller (VC) code into dedicated layerKevin Hilman4-261/+302
As part of the voltage layer cleanup, split out VC specific code into a dedicated VC layer. This patch primarily just moves VC code from voltage.c into vc.c, and adds prototypes to vc.h. No functional changes. For readability, each function was given a local 'vc' pointer: struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; and a global replace of s/vdd->vc_data/vc/ was done. Also vc_init was renamed to vc_init_channel to reflect that this is per-VC channel initializtion. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: keep track of powerdomains in each voltagedomainKevin Hilman4-0/+93
When a powerdomain is registered and it has an associated voltage domain, add the powerdomain to the voltagedomain using voltdm_add_pwrdm(). Also add voltagedomain iterator helper functions to iterate over all registered voltagedomains and all powerdomains associated with a voltagedomain. Modeled after a similar relationship between clockdomains and powerdomains. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: powerdomain: add voltage domain lookup during registerKevin Hilman3-0/+23
When a powerdomain is registered, lookup the voltage domain by name and keep a pointer to the containing voltagedomain in the powerdomain structure. Modeled after similar method between powerdomain and clockdomain layers. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP4: powerdomain data: add voltage domainsBenoit Cousson2-0/+21
Add voltage domain name to indicate which voltagedomain each powerdomain is in. The fixed voltage domain like ldo_wakeup for emu and wkup power domain is added too. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/ Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP3: powerdomain data: add voltage domainsKevin Hilman2-0/+18
Add voltage domain name to indicate which voltagedomain each powerdomain is in. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2: add voltage domains and connect to powerdomainsKevin Hilman6-2/+42
Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains with the newly created voltage domains. While here, update copyright on powerdomain data to 2011. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: powerdomain: add voltagedomain to struct powerdomainKevin Hilman1-0/+7
Each powerdomain is associated with a voltage domain. Add an entry to struct powerdomain where the enclosing voltagedomain can be referenced. Modeled after similar relationship between clockdomains and powerdomains. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP3+: voltage: add scalable flag to voltagedomainKevin Hilman4-0/+10
Add a 'bool scalable' flag to the struct powerdomain and set it for the scalable domains on OMAP3 and OMAP4. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP3: voltagedomain data: add wakeup domainKevin Hilman1-0/+5
Add wakeup voltage domain so that the wakeup powerdomain can have an associated powerdomain. Note that the scalable flat is not set for the this voltagedomain, so it will not be fully initialized like scalable voltage domains. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP3: voltage: rename "mpu" voltagedomain to "mpu_iva"Kevin Hilman4-5/+5
This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so rename appropriately. Also fixup any users of the "mpu" name to use "mpu_iva" Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: start towards a new voltagedomain layerKevin Hilman8-172/+207
Start cleaning up the voltage layer to have a voltage domain layer that resembles the structure of the existing clock and power domain layers. To that end: - move the 'struct voltagedomain' out of 'struct omap_vdd_info' to become the primary data structure. - convert any functions taking a pointer to struct omap_vdd_info into functions taking a struct voltagedomain pointer. - convert the register & initialize of voltage domains to look like that of powerdomains - convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled after the current powerdomain and clockdomain lookup functions. - omap_voltage_late_init(): only configure VDD info when the vdd_info struct is non-NULL Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: move prm_irqst_reg from VP into voltage domainKevin Hilman7-16/+13
The prm_irqst_reg is not part of the VP. Move it up into the common voltage domain struct. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: voltage: move PRCM mod offets into VC/VP structuresKevin Hilman10-70/+70
Eliminate need for global variables for the various PRM module offsets by making them part of the VP/VC common structures Eventually, these will likely be moved again, or more likely removed when VP/VC code is isolated, but for now just getting rid of them as global variabes so that the voltage domain initialization can be cleaned up. Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-15OMAP2+: hwmod: remove unused voltagedomain pointerKevin Hilman1-1/+0
The voltage domain pointer currently in struct omap_hwmod is not used and does not belong here. Instead, voltage domains will be associated with powerdomains in forthcoming patches. Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-14OMAP: powerdomain: remove omap_chip bitmasksPaul Walmsley8-96/+79
At Tony's request, remove the omap_chip bitmasks from the powerdomain definitions. Instead, initialize powerdomains based on one or more lists that are applicable to a particular SoC family, variant, and silicon revision. Gražvydas Ignotas <notasas@gmail.com> found and reported a bug in a related patch that also applied to this patch - thanks Gražvydas. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Gražvydas Ignotas <notasas@gmail.com>
2011-09-14OMAP: powerdomain: split pwrdm_init() into two functionsPaul Walmsley5-26/+74
In preparation for OMAP_CHIP() removal, split pwrdm_init() into three functions. This allows some of them to be called multiple times: for example, pwrdm_register_pwrdms() can be called once to register powerdomains that are common to a group of SoCs, and once to register powerdomains that are specific to a single SoC. The appropriate order to call these functions - which is enforced by the code - is: 1. pwrdm_register_platform_funcs() 2. pwrdm_register_pwrdms() (can be called multiple times) 3. pwrdm_complete_init() Convert the OMAP2, 3, and 4 powerdomain init code to use these new functions. While here, improve documentation, and increase CodingStyle conformance by shortening some local variable names. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-09-14OMAP: clockdomain code/data: remove omap_chip bitmask from struct clockdomainPaul Walmsley11-1156/+842
At Tony's request, remove the omap_chip bitmasks from the clockdomain and clockdomain dependency definitions. Instead, initialize clockdomains based on one or more lists that are applicable to a particular SoC family, variant, and silicon revision. Tony Lindgren <tony@atomide.com> found a bug in a previous version of this patch - thanks Tony. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
2011-09-14OMAP: clockdomain: split clkdm_init()Paul Walmsley4-34/+121
In preparation for OMAP_CHIP() removal, split clkdm_init() into four functions. This allows some of them to be called multiple times: for example, clkdm_register_clkdms() can be called once to register clockdomains that are common to a group of SoCs, and once to register clockdomains that are specific to a single SoC. The appropriate order to call these functions - which is enforced by the code - is: 1. clkdm_register_platform_funcs() 2. clkdm_register_clkdms() (can be called multiple times) 3. clkdm_register_autodeps() (optional; deprecated) 4. clkdm_complete_init() Convert the OMAP2, 3, and 4 clockdomain init code to use these new functions. While here, improve documentation, and increase CodingStyle conformance by shortening some local variable names. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-09-14OMAP2+: id: remove OMAP_REVBITS_* macrosPaul Walmsley1-23/+10
The OMAP_REVBITS_* macros are just used as otherwise meaningless aliases for the numbers zero through five, so remove these macros. Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-14OMAP3: id: remove duplicate code for testing SoC ES levelPaul Walmsley1-57/+23
omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-14OMAP3: id: add fallthrough warning; fix some CodingStyle issuesPaul Walmsley1-5/+6
Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on. Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Hemant Pedanekar <hemantp@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-14OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levelsPaul Walmsley2-2/+11
Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-14OMAP3: id: remove useless strcpy()sPaul Walmsley1-26/+22
omap3_cpuinfo() is filled with useless strcpy() calls; remove them. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-13OMAP3: id: remove identification codes that only correspond to marketing namesPaul Walmsley3-22/+22
The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family. The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family. Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS. Thanks to Tony Lindgren <tony@atomide.com> for some help with the second revision of this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
2011-09-04Merge branches 'non_hwmod_compliant_fix_3.1rc', 'omap3_clock_fixes_3.1rc', ↵Paul Walmsley65-332/+582
'omap4_clock_fixes_3.1rc', 'missing_2430_musb_adds_terminator_fix_3.1rc' and 'pwrdm_clkdm_fixes_3.1rc' into prcm-fixes-a-3.1rc
2011-09-04OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]Paul Walmsley1-0/+1
Add a missing array terminator to omap2430_usbhsotg_addrs[]. Without this terminator, the omap_hwmod resource building code runs off the end of the array, resulting in at least this error -- if not worse behavior: [ 0.578002] musb-omap2430: failed to claim resource 4 [ 0.583465] omap_device: musb-omap2430: build failed (-16) [ 0.589294] Could not build omap_device for musb-omap2430 usb_otg_hs This should have been part of commit 78183f3fdf76f422431a81852468be01b36db325 ("omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays") but was evidently missed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-08-28Merge branch 'pm-fixes' of ↵Linus Torvalds4-1/+6
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm * 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental) OMAP: omap_device: only override _noirq methods, not normal suspend/resume PM / Runtime: Correct documentation of pm_runtime_irq_safe() ARM: mach-shmobile: sh7372 LCDC1 suspend fix sh-sci / PM: Use power.irq_safe PM: Use spinlock instead of mutex in clock management functions
2011-08-27ARM: mach-shmobile: sh7372 LCDC1 suspend fix V2 (incremental)Magnus Damm1-1/+1
This patch updates the recently submitted "Associate the HDMI clock together with LCDC1 on sh7372" to V2 with the following change: - Use lcdc1_device on AP4EVB to build properly. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-08-26All Arch: remove linkage for sys_nfsservctl system callNeilBrown28-33/+26
The nfsservctl system call is now gone, so we should remove all linkage for it. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: J. Bruce Fields <bfields@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-26Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2-9/+12
* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] memory hotplug: only unassign assigned increments [S390] Change default action from reipl to stop for on_restart [S390] arch/s390/kernel/ipl.c: correct error detection check [S390] drivers/s390/block/dasd_ioctl.c: add missing kfree [S390] nss,initrd: kernel image and initrd must be in different segments
2011-08-26sfi: table irq 0xFF means 'no interrupt'Kirill A. Shutemov1-1/+3
According to the SFI specification irq number 0xFF means device has no interrupt or interrupt attached via GPIO. Currently, we don't handle this special case and set irq field in *_board_info structs to 255. It leads to confusion in some drivers. Accelerometer driver tries to register interrupt 255, fails and prints "Cannot get IRQ" to dmesg. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear valueLiu Gang-B341821-2/+3
This bug causes the IECSR register clear failure. In this case, the RETE (retry error threshold exceeded) interrupt will be generated and cannot be cleared. So the related ISR may be called persistently. The RETE bit in IECSR is cleared by writing a 1 to it. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25cris: add arch/cris/include/asm/serial.hWANG Cong1-0/+9
Fix the following build errors: drivers/tty/serial/8250_early.c:160: error: 'BASE_BAUD' undeclared (first use in this function): 1 errors in 1 logs drivers/tty/serial/8250_early.c:37:24: error: asm/serial.h: No such file or directory: 1 errors in 1 logs I am not sure if (1843200 / 16) is suitable for cris, but most other arch's define it as this value. Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25alpha: unbreak osf_setsysinfo(SSI_NVPAIRS, [SSIN_UACPROC, UAC_SIGBUS])Sergei Trofimovich3-18/+11
The bug was accidentally found by the following program: #include <asm/sysinfo.h> #include <asm/unistd.h> #include <sys/syscall.h> static int setsysinfo(unsigned long op, void *buffer, unsigned long size, int *start, void *arg, unsigned long flag) { return syscall(__NR_osf_setsysinfo, op, buffer, size, start, arg, flag); } int main(int argc, char **argv) { short x[10]; unsigned int buf[2] = { SSIN_UACPROC, UAC_SIGBUS, }; setsysinfo(SSI_NVPAIRS, buf, 1, 0, 0, 0); int *y = (int*) (x+1); *y = 0; return 0; } The program shoud fail on SIGBUS, but didn't. The patch is a second part of userspace flag fix (commit 745dd2405e28 "Alpha: Rearrange thread info flags fixing two regressions"). Deleted outdated out-of-sync 'UAC_SHIFT' (the cause of bug) in favour of 'ALPHA_UAC_SHIFT'. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org> Acked-by: Michael Cree <mcree@orcon.net.nz> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25x86-32: Fix boot with CONFIG_X86_INVD_BUGAndy Lutomirski1-6/+2
entry_32.S contained a hardcoded alternative instruction entry, and the format changed in commit 59e97e4d6fbc ("x86: Make alternative instruction pointers relative"). Replace the hardcoded entry with the altinstruction_entry macro. This fixes the 32-bit boot with CONFIG_X86_INVD_BUG=y. Reported-and-tested-by: Arnaud Lacombe <lacombar@gmail.com> Signed-off-by: Andy Lutomirski <luto@mit.edu> Cc: Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25mtrr: fix UP breakage caused during switch to stop_machineTejun Heo1-2/+0
While removing custom rendezvous code and switching to stop_machine, commit 192d8857427d ("x86, mtrr: use stop_machine APIs for doing MTRR rendezvous") completely dropped mtrr setting code on !CONFIG_SMP breaking MTRR settting on UP. Fix it by removing the incorrect CONFIG_SMP. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Anders Eriksson <aeriksson@fastmail.fm> Tested-and-acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-08-25OMAP: omap_device: only override _noirq methods, not normal suspend/resumeKevin Hilman1-1/+2
Commit c03f007a8bf0e092caeb6856a5c8a850df10b974 (OMAP: PM: omap_device: add system PM methods for PM domain handling) mistakenly used SET_SYSTEM_SLEEP_PM_OPS() when trying to configure custom methods for the PM domains noirq methods. Fix that by setting only the suspend_noirq and resume_noirq methods with custom versions. Note that all other PM domain methods (including the "normal" suspend/resume methods) are populated using USE_PLATFORM_PM_SLEEP_OPS, which configures them all to the default subsystem (platform_bus) methods. Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-08-24ARM: mach-shmobile: sh7372 LCDC1 suspend fixMagnus Damm3-0/+4
Associate the HDMI clock together with LCDC1 on sh7372. Without this patch Suspend-to-RAM hangs on the boards AP4EVB and Mackerel. The code hangs in the LCDC driver where the software is waiting forever for the hardware to power down. By explicitly associating the HDMI clock with LCDC1 we can make sure the HDMI clock is enabled using Runtime PM whenever the driver is accessing the hardware. This HDMI and LCDC1 dependency is documented in the sh7372 data sheet. Older kernels did work as expected but the recently merged (3.1-rc) 794d78f drivers: sh: late disabling of clocks V2 introduced code to turn off clocks lacking software reference which happens to include the HDMI clock that is needed by LCDC1 to operate as expected. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2011-08-24Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds8-233/+468
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc: Allow handling signals when stack is corrupted.
2011-08-24[S390] Change default action from reipl to stop for on_restartMichael Holzheu1-2/+3
The main purpose for PSW restart will be kdump. Therefore customers will issue "system restart" for creating a dump. If kdump is not enabled, currently "PSW restart" will reboot the system and then no dump can be created any more. In order to still allow a manual stand-alone dump in the case a user issues "PSW restart" on a system that has not enabled kdump we now stop the system. Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2011-08-24[S390] arch/s390/kernel/ipl.c: correct error detection checkJulia Lawall1-1/+1
reipl_fcp_kset was just initialized, so it appears that it should be tested instead of reipl_kset. Signed-off-by: Julia Lawall <julia@diku.dk> Reported-by: Suman Saha <sumsaha@gmail.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2011-08-24[S390] nss,initrd: kernel image and initrd must be in different segmentsHeiko Carstens1-6/+8
When IPL'ing from a block device and an NSS should be created we must make sure that the kernel image and the initrd are in different 1MB segments. Otherwise creating the NSS will fail. So we make sure the initrd is 4MB behind the end of the kernel image like we do already when IPL via the VM reader is performed. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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