diff options
authorChris Wilson <>2011-12-14 13:57:23 +0100
committerDaniel Vetter <>2012-03-01 21:36:13 +0100
commitc501ae7f332cdaf42e31af30b72b4b66cbbb1604 (patch)
parentc3dfefa0a6d235bd465309e12f4c56ea16e71111 (diff)
drm/i915: Only clear the GPU domains upon a successful finishdrm-intel-next-2012-03-01
By clearing the GPU read domains before waiting upon the buffer, we run the risk of the wait being interrupted and the domains prematurely cleared. The next time we attempt to wait upon the buffer (after userspace handles the signal), we believe that the buffer is idle and so skip the wait. There are a number of bugs across all generations which show signs of an overly haste reuse of active buffers. Such as: A couple of those pre-date i915_gem_object_finish_gpu(), so may be unrelated (such as a wild write from a userspace command buffer), but this does look like a convincing cause for most of those bugs. Signed-off-by: Chris Wilson <> Cc: Reviewed-by: Daniel Vetter <> Reviewed-by: Eugeni Dodonov <> Signed-off-by: Daniel Vetter <>
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6dbcec38795..1f441f5c240 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3064,10 +3064,13 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)
return ret;
+ ret = i915_gem_object_wait_rendering(obj);
+ if (ret)
+ return ret;
/* Ensure that we invalidate the GPU's caches and TLBs. */
obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
- return i915_gem_object_wait_rendering(obj);
+ return 0;