summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_dsi_cmd.h
blob: 1d1a716e473ac013105d8b364d29e91a8059008b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
/*
 * Copyright © 2013 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Author: Jani Nikula <jani.nikula@intel.com>
 */

#ifndef _INTEL_DSI_DSI_H
#define _INTEL_DSI_DSI_H

#include <drm/drmP.h>
#include <drm/drm_crtc.h>
#include <video/mipi_display.h>
#include "i915_drv.h"
#include "intel_drv.h"
#include "intel_dsi.h"

#define DPI_LP_MODE_EN	false
#define DPI_HS_MODE_EN	true

void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
						enum port port);

int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
		     const u8 *data, int len, enum port port);

int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
			 const u8 *data, int len, enum port port);

int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
		    u8 *buf, int buflen, enum port port);

int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
		u8 *reqdata, int reqlen, u8 *buf, int buflen, enum port port);

int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd, bool hs, enum port port);
void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi);

/* XXX: questionable write helpers */
static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi,
				     int channel, u8 dcs_cmd, enum port port)
{
	return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1, port);
}

static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi,
			int channel, u8 dcs_cmd, u8 param, enum port port)
{
	u8 buf[2] = { dcs_cmd, param };
	return dsi_vc_dcs_write(intel_dsi, channel, buf, 2, port);
}

static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi,
					 int channel, enum port port)
{
	return dsi_vc_generic_write(intel_dsi, channel, NULL, 0, port);
}

static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi,
					 int channel, u8 param, enum port port)
{
	return dsi_vc_generic_write(intel_dsi, channel, &param, 1, port);
}

static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
			int channel, u8 param1, u8 param2, enum port port)
{
	u8 buf[2] = { param1, param2 };
	return dsi_vc_generic_write(intel_dsi, channel, buf, 2, port);
}

/* XXX: questionable read helpers */
static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
			int channel, u8 *buf, int buflen, enum port port)
{
	return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen,
									port);
}

static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
					int channel, u8 param, u8 *buf,
					int buflen, enum port port)
{
	return dsi_vc_generic_read(intel_dsi, channel, &param, 1, buf, buflen,
									port);
}

static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
					int channel, u8 param1, u8 param2,
					u8 *buf, int buflen, enum port port)
{
	u8 req[2] = { param1, param2 };

	return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen,
									port);
}


#endif /* _INTEL_DSI_DSI_H */