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authorBen Widawsky <benjamin.widawsky@intel.com>2014-04-01 21:29:22 -0700
committerBen Widawsky <benjamin.widawsky@intel.com>2014-06-20 17:05:00 -0700
commitc77f8cfbe4680989329dde7624e3f849bd9802a2 (patch)
treef58ca00d6909f1ca875341a7c1682c78e8e2c236
parentabf4e134a177694976848b9c4e80039694146299 (diff)
drm/i915/bdw: Optimize PDP loads
Don't do them if they're not necessary, which they're not, for the RCS, in certain conditions. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c20
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.h1
2 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 65900926de3f..180a9ba53025 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -445,8 +445,20 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
struct intel_engine_cs *ring,
bool synchronous)
{
+ struct drm_i915_private *dev_priv = ring->dev->dev_private;
int i, ret;
+ /* The RCS ring gets reloaded by the hardware context state. So we only
+ * need to actually reload if one of the page directory pointer have
+ * changed, or it's !RCS
+ *
+ * Aliasing PPGTT remains special, as we do not track it's
+ * reloading needs.
+ */
+ if (ppgtt != dev_priv->mm.aliasing_ppgtt &&
+ ring->id == RCS && !ppgtt->pdp.needs_reload)
+ return 0;
+
for (i = GEN8_LEGACY_PDPES - 1; i >= 0; i--) {
struct i915_pagedir *pd = ppgtt->pdp.pagedirs[i];
dma_addr_t addr = pd ? pd->daddr : ppgtt->scratch_pt->daddr;
@@ -457,6 +469,9 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
return ret;
}
+
+ ppgtt->pdp.needs_reload = 0;
+
return 0;
}
@@ -658,6 +673,7 @@ static void gen8_teardown_va_range(struct i915_address_space *vm,
free_pd_single(pd, vm->dev);
ppgtt->pdp.pagedirs[pdpe] = NULL;
WARN_ON(!test_and_clear_bit(pdpe, ppgtt->pdp.used_pdpes));
+ ppgtt->pdp.needs_reload = 1;
}
}
}
@@ -908,6 +924,8 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
}
set_bit(pdpe, ppgtt->pdp.used_pdpes);
+ if (test_and_set_bit(pdpe, ppgtt->pdp.used_pdpes))
+ ppgtt->pdp.needs_reload = 1;
gen8_map_pagetable_range(pd, start, length, ppgtt->base.dev);
}
@@ -944,6 +962,8 @@ static int gen8_ppgtt_init_common(struct i915_hw_ppgtt *ppgtt, uint64_t size)
ppgtt->switch_mm = gen8_mm_switch;
ppgtt->base.insert_entries = gen8_ppgtt_insert_entries;
+ ppgtt->pdp.needs_reload = 1;
+
ppgtt->scratch_pd = alloc_pt_scratch(ppgtt->base.dev);
if (IS_ERR(ppgtt->scratch_pd))
return PTR_ERR(ppgtt->scratch_pd);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 5d4bd3e83eec..6fdeb9896dc7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -199,6 +199,7 @@ struct i915_pagedirpo {
/* struct page *page; */
DECLARE_BITMAP(used_pdpes, GEN8_LEGACY_PDPES);
struct i915_pagedir *pagedirs[GEN8_LEGACY_PDPES];
+ unsigned needs_reload:1;
};
struct i915_address_space {