diff options
Diffstat (limited to 'i965_drv_video/shaders/vme/intra_frame.asm')
| -rw-r--r-- | i965_drv_video/shaders/vme/intra_frame.asm | 56 |
1 files changed, 42 insertions, 14 deletions
diff --git a/i965_drv_video/shaders/vme/intra_frame.asm b/i965_drv_video/shaders/vme/intra_frame.asm index 65cd58b..809b5f3 100644 --- a/i965_drv_video/shaders/vme/intra_frame.asm +++ b/i965_drv_video/shaders/vme/intra_frame.asm @@ -15,8 +15,6 @@ // Now, begin source code.... // -include(`vme_header.inc') - /* * __START */ @@ -34,7 +32,7 @@ add (1) tmp_reg0.4<1>:D tmp_reg0.4<0,1,0>:D -1:W {align1}; /* Y offs mov (1) tmp_reg0.8<1>:UD BLOCK_32X1 {align1}; mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; -send (16) 0 INEP_ROW null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; /* COL */ mul (2) tmp_reg0.0<1>:D orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ @@ -42,7 +40,7 @@ add (1) tmp_reg0.0<1>:D tmp_reg0.0<0,1,0>:D -4:W {align1}; /* X offs mov (1) tmp_reg0.8<1>:UD BLOCK_4X16 {align1}; mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; -send (16) 0 INEP_COL0 null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; /* * VME message @@ -50,7 +48,7 @@ send (16) 0 INEP_COL0 null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; /* m0 */ mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; /* m1 */ mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE + LUMA_INTRA_4x4_DISABLE {align1}; @@ -69,16 +67,32 @@ add (1) tmp_x_w<1>:W w_in_mb_uw<0,1,0>:UW -tmp_x_w<0,1,0>:W {align1}; mul.nz.f0.0 (1) null<1>:UD tmp_x_w<0,1,0>:W orig_y_ub<0,1,0>:UB {align1}; /* (width - (X + 1)) * Y != 0 */ (f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_C {align1}; /* C */ -mov (8) msg_reg1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; /* m2 */ -mov (8) msg_reg2<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; - +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + /* m3 */ -mov (8) msg_reg3<1>:UD 0x0 {align1}; -mov (16) msg_reg3.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; -mov (1) msg_reg3.16<1>:UD INTRA_PREDICTORE_MODE {align1}; -send (8) 0 vme_wb null vme(BIND_IDX_VME,0,0,VME_MESSAGE_TYPE_INTRA) mlen 4 rlen 1 {align1}; +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_INTRA + ) + mlen vme_msg_length + rlen vme_intra_wb_length + {align1}; /* * Oword Block Write message @@ -93,10 +107,24 @@ mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; /* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ -send (16) 0 obw_wb null write(BIND_IDX_OUTPUT, 0, 8, 1) mlen 2 rlen 1 {align1}; +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; /* * kill thread */ mov (8) msg_reg0<1>:UD r0<8,8,1>:UD {align1}; -send (16) 0 acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; +send (16) msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; |