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authorJosé Hiram Soltren <jsoltren@nvidia.com>2015-03-13 13:39:35 -0500
committerAaron Plattner <aplattner@nvidia.com>2015-03-16 12:14:08 -0700
commit8e1e235cbd81ed49b2646cf344503587b4e7a70a (patch)
treebec4dd3fe2f8da5918f0f208a65a7096aef4d973
parent686633d21b10293a10c1d6ba77499b0d67c23056 (diff)
Fix error in sizes of H265 column width and row height, arrays
An NVIDIA internal hardware document noted: #define MAX_TILE_COLS 20 #define MAX_TILE_ROWS 22 As of this writing the VDPAU API writes: /** Only need to set 0..num_tile_columns_minus1. The struct definition reserves up to the maximum of 22. Invalid values are ignored. */ uint16_t column_width_minus1[22]; /** Only need to set 0..num_tile_rows_minus1. The struct definition reserves up to the maximum of 20. Invalid values are ignored.*/ uint16_t row_height_minus1[20]; This is not correct. The correct definitions ought to be: uint16_t column_width_minus1[20]; uint16_t row_height_minus1[22]; The H.265 Specification does not give an explicit range for the sizes of these arrays. It is possible to calculate an upper limit for a particular video frame implicitly using these equations: MinCbLog2SizeY = log2_min_luma_coding_block_size_minus3 + 3 (7-10) CtbLog2SizeY = MinCbLog2SizeY + log2_diff_max_min_luma_coding_block_size (7-11) CtbSizeY = 1 << CtbLog2SizeY (7-13) PicWidthInCtbsY = Ceil( pic_width_in_luma_samples ÷ CtbSizeY ) (7-15) num_tile_columns_minus1 ϵ [0, PicWidthInCtbsY − 1] (num_tile_rows_minus1 is similar) For a video with: log2_min_luma_coding_block_size_minus3 = 0 log2_diff_max_min_luma_coding_block_size = 0 pic_width_in_luma_samples = 4096 num_tile_columns_minus1 < 512 This seems patological. Perhaps we could cap column_width_minus1[] and row_height_minus1[] at 32 or 64 elements apiece if other hardware implementations saw a reason to do so. This change as proposed does not alter the size of VdpPictureInfoHEVC, but it *does* change the ABI. We can either add it as a fixup to the just released VDPAU 1.0, or create a follow-on patch structure. Since few have adopted VdpPictureInfoHEVC since Monday my preference is to fix the existing structure. Signed-off-by: Aaron Plattner <aplattner@nvidia.com> Acked-by: Aaron Plattner <aplattner@nvidia.com>
-rw-r--r--include/vdpau/vdpau.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/vdpau/vdpau.h b/include/vdpau/vdpau.h
index 13847ca..a0c4daf 100644
--- a/include/vdpau/vdpau.h
+++ b/include/vdpau/vdpau.h
@@ -3201,13 +3201,13 @@ typedef struct {
/** Only valid if tiles_enabled_flag is set. Ignored otherwise. */
uint8_t uniform_spacing_flag;
/** Only need to set 0..num_tile_columns_minus1. The struct
- definition reserves up to the maximum of 22. Invalid values are
+ definition reserves up to the maximum of 20. Invalid values are
ignored. */
- uint16_t column_width_minus1[22];
+ uint16_t column_width_minus1[20];
/** Only need to set 0..num_tile_rows_minus1. The struct
- definition reserves up to the maximum of 20. Invalid values are
+ definition reserves up to the maximum of 22. Invalid values are
ignored.*/
- uint16_t row_height_minus1[20];
+ uint16_t row_height_minus1[22];
/** Only needed if tiles_enabled_flag is set. Invalid values are
ignored. */
uint8_t loop_filter_across_tiles_enabled_flag;