From b12c390b9108d44cb0b05900d6c11a73ee0e9cae Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 6 Jan 2011 19:37:54 +0000 Subject: target-arm: Set softfloat cumulative exc flags from correct FPSCR bits When handling a write to the ARM FPSCR, set the softfloat cumulative exception flags from the cumulative flags in the FPSCR, not the exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host will only look at the correct bits anyway. Signed-off-by: Peter Maydell Acked-by: Aurelien Jarno Signed-off-by: Aurelien Jarno --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 50c1017c8..05684a2f4 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2315,7 +2315,7 @@ void HELPER(vfp_set_fpscr)(CPUState *env, uint32_t val) if (changed & (1 << 25)) set_default_nan_mode((val & (1 << 25)) != 0, &env->vfp.fp_status); - i = vfp_exceptbits_to_host((val >> 8) & 0x1f); + i = vfp_exceptbits_to_host(val); set_float_exception_flags(i, &env->vfp.fp_status); } -- cgit v1.2.3