diff options
Diffstat (limited to 'src/nvc0_xv.c')
-rw-r--r-- | src/nvc0_xv.c | 72 |
1 files changed, 34 insertions, 38 deletions
diff --git a/src/nvc0_xv.c b/src/nvc0_xv.c index ee8babb..a2a4c9e 100644 --- a/src/nvc0_xv.c +++ b/src/nvc0_xv.c @@ -43,48 +43,48 @@ nvc0_xv_m2mf(struct nouveau_grobj *m2mf, { struct nouveau_channel *chan = m2mf->channel; - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_MODE_OUT, 5); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_MODE_OUT), 5); OUT_RING (chan, dst->tile_mode); OUT_RING (chan, dst_pitch); OUT_RING (chan, nlines); OUT_RING (chan, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_POSITION_OUT_X, 2); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_POSITION_OUT_X), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); if (uv_offset) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_IN_HIGH), 2); OUT_RELOCh(chan, src, line_len * nlines, NOUVEAU_BO_GART | NOUVEAU_BO_RD); OUT_RELOCl(chan, src, line_len * nlines, NOUVEAU_BO_GART | NOUVEAU_BO_RD); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); OUT_RELOCh(chan, dst, uv_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); OUT_RELOCl(chan, dst, uv_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_IN, 4); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_IN), 4); OUT_RING (chan, line_len); OUT_RING (chan, dst_pitch); OUT_RING (chan, line_len); OUT_RING (chan, nlines >> 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100010); } - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_IN_HIGH), 2); OUT_RELOCh(chan, src, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RD); OUT_RELOCl(chan, src, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RD); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); OUT_RELOCh(chan, dst, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); OUT_RELOCl(chan, dst, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_IN, 4); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_IN), 4); OUT_RING (chan, line_len); OUT_RING (chan, dst_pitch); OUT_RING (chan, line_len); OUT_RING (chan, nlines); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100010); } @@ -115,8 +115,6 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); - struct nouveau_grobj *m2mf = pNv->NvMemFormat; - struct nouveau_grobj *fermi = pNv->Nv3D; const unsigned shd_flags = NOUVEAU_BO_RD | NOUVEAU_BO_VRAM; const unsigned tcb_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; uint32_t mode = 0xd0005000 | (src->tile_mode << 18); @@ -124,7 +122,7 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, if (MARK_RING(chan, 256, 18)) return FALSE; - BEGIN_RING(chan, fermi, NVC0_3D_RT_ADDRESS_HIGH(0), 8); + BEGIN_NVC0(chan, NVC0_3D(RT_ADDRESS_HIGH(0)), 8); if (OUT_RELOCh(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); @@ -142,10 +140,10 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_ENABLE(0), 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TIC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); @@ -153,18 +151,18 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, } OUT_RING (chan, 15); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 16 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 16); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { OUT_RING (chan, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | @@ -249,7 +247,7 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); } - BEGIN_RING(chan, fermi, NVC0_3D_TSC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TSC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); @@ -257,18 +255,18 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, } OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 16 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 16); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 16); OUT_RING (chan, NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE); @@ -294,26 +292,26 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, fermi, NVC0_3D_CODE_ADDRESS_HIGH, 2); + BEGIN_NVC0(chan, NVC0_3D(CODE_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, fermi, NVC0_3D_SP_START_ID(5), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_START_ID(5)), 1); OUT_RING (chan, PFP_NV12); - BEGIN_RING(chan, fermi, NVC0_3D_TSC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TSC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TIC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TEX_CACHE_CTL, 1); + BEGIN_NVC0(chan, NVC0_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, 0x203); return TRUE; @@ -332,7 +330,6 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *fermi = pNv->Nv3D; float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -375,16 +372,16 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, return BadAlloc; } - BEGIN_RING(chan, fermi, NVC0_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NVC0(chan, NVC0_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, sx2 << NVC0_3D_SCISSOR_HORIZ_MAX__SHIFT | sx1); OUT_RING (chan, sy2 << NVC0_3D_SCISSOR_VERT_MAX__SHIFT | sy1 ); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_BEGIN_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_BEGIN_GL), 1); OUT_RING (chan, NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES); VTX2s(pNv, tx1, ty1, tx1, ty1, sx1, sy1); VTX2s(pNv, tx2+(tx2-tx1), ty1, tx2+(tx2-tx1), ty1, sx2+(sx2-sx1), sy1); VTX2s(pNv, tx1, ty2+(ty2-ty1), tx1, ty2+(ty2-ty1), sx1, sy2+(sy2-sy1)); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_END_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_END_GL), 1); OUT_RING (chan, 0); pbox++; @@ -399,19 +396,18 @@ nvc0_xv_csc_update(NVPtr pNv, float yco, float *off, float *uco, float *vco) { struct nouveau_channel *chan = pNv->chan; struct nouveau_bo *bo = pNv->tesla_scratch; - struct nouveau_grobj *fermi = pNv->Nv3D; if (MARK_RING(chan, 64, 2)) return; - BEGIN_RING(chan, fermi, NVC0_3D_CB_SIZE, 3); + BEGIN_NVC0(chan, NVC0_3D(CB_SIZE), 3); OUT_RING (chan, 256); if (OUT_RELOCh(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return; } - BEGIN_RING(chan, fermi, NVC0_3D_CB_POS, 11); + BEGIN_NVC0(chan, NVC0_3D(CB_POS), 11); OUT_RING (chan, 0); OUT_RINGf (chan, yco); OUT_RINGf (chan, off[0]); |