Remove pNv->NVArch

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

12 files changed, 52 insertions, 56 deletions

diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index d71133f..c315299 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -1297,7 +1297,7 @@ drmmode_cursor_init(ScreenPtr pScreen)
 	int size = nv_cursor_width(pNv);
 	int flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
 		    HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32 |
-		    (pNv->NVArch >= 0x11 ? HARDWARE_CURSOR_ARGB : 0) |
+		    (pNv->dev->chipset >= 0x11 ? HARDWARE_CURSOR_ARGB : 0) |
 		    HARDWARE_CURSOR_UPDATE_UNHIDDEN;
 
 	return xf86_cursors_init(pScreen, size, size, flags);
diff --git a/src/nouveau_exa.c b/src/nouveau_exa.c
index d8c2d45..3165f08 100644
--- a/src/nouveau_exa.c
+++ b/src/nouveau_exa.c
@@ -408,7 +408,7 @@ nouveau_exa_create_pixmap(ScreenPtr pScreen, int width, int height, int depth,
 		} else {
 			if (usage_hint & NOUVEAU_CREATE_PIXMAP_TILED) {
 				int pitch_align =
-					pNv->NVArch >= 0x40 ? 1024 : 256;
+					pNv->dev->chipset >= 0x40 ? 1024 : 256;
 
 				*new_pitch = NOUVEAU_ALIGN(*new_pitch,
 							   pitch_align);
diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c
index 8416f2b..b5eae26 100644
--- a/src/nouveau_xv.c
+++ b/src/nouveau_xv.c
@@ -869,7 +869,7 @@ NV_set_action_flags(ScrnInfoPtr pScrn, DrawablePtr pDraw, NVPortPrivPtr pPriv,
 	if (USING_OVERLAY && (pNv->Architecture == NV_ARCH_10 ||
 			      pNv->Architecture == NV_ARCH_20)) {
 		/* No YV12 overlay on NV10, 11, 15, 20, NFORCE */
-		switch (pNv->NVArch) {
+		switch (pNv->dev->chipset) {
 		case 0x10:
 		case 0x11:
 		case 0x15:
@@ -1608,7 +1608,7 @@ NVSetupBlitVideo (ScreenPtr pScreen)
 	for(i = 0; i < NUM_BLIT_PORTS; i++)
 		adapt->pPortPrivates[i].ptr = (pointer)(pPriv);
 
-	if (pNv->NVArch >= 0x11) {
+	if (pNv->dev->chipset >= 0x11) {
 		adapt->pAttributes = NVBlitAttributes;
 		adapt->nAttributes = NUM_BLIT_ATTRIBUTES;
 	} else {
@@ -1635,7 +1635,7 @@ NVSetupBlitVideo (ScreenPtr pScreen)
 	pPriv->texture			= FALSE;
 	pPriv->bicubic			= FALSE;
 	pPriv->doubleBuffer		= FALSE;
-	pPriv->SyncToVBlank		= (pNv->NVArch >= 0x11);
+	pPriv->SyncToVBlank		= (pNv->dev->chipset >= 0x11);
 
 	pNv->blitAdaptor		= adapt;
 
@@ -1778,7 +1778,7 @@ NVChipsetHasOverlay(NVPtr pNv)
 	case NV_ARCH_30:
 		return TRUE;
 	case NV_ARCH_40:
-		if (pNv->NVArch == 0x40)
+		if (pNv->dev->chipset == 0x40)
 			return TRUE;
 		break;
 	default:
diff --git a/src/nv04_xv_blit.c b/src/nv04_xv_blit.c
index 831a0f0..54bfe91 100644
--- a/src/nv04_xv_blit.c
+++ b/src/nv04_xv_blit.c
@@ -36,7 +36,7 @@
 
 #define FOURCC_RGB 0x0000003
 
-#define VSYNC_POSSIBLE (pNv->NVArch >= 0x11)
+#define VSYNC_POSSIBLE (pNv->dev->chipset >= 0x11)
 
 extern Atom xvSetDefaults, xvSyncToVBlank;
 
@@ -141,7 +141,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
                         NVWaitVSync(pScrn, 1);
         }
 
-        if (pNv->NVArch >= 0x05) {
+        if (pNv->dev->chipset >= 0x05) {
                 BEGIN_RING(chan, sifm,
 				 NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
                 OUT_RING  (chan, src_format);
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index d74b052..ecf743b 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -728,15 +728,15 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
 	uint32_t class = 0;
 	int i;
 
-	if (((pNv->NVArch & 0xf0) != NV_ARCH_10) &&
-	    ((pNv->NVArch & 0xf0) != NV_ARCH_20))
+	if (((pNv->dev->chipset & 0xf0) != NV_ARCH_10) &&
+	    ((pNv->dev->chipset & 0xf0) != NV_ARCH_20))
 		return FALSE;
 
-	if (pNv->NVArch >= 0x20 || pNv->NVArch == 0x1a)
+	if (pNv->dev->chipset >= 0x20 || pNv->dev->chipset == 0x1a)
 		class = NV11TCL;
-	else if (pNv->NVArch >= 0x17)
+	else if (pNv->dev->chipset >= 0x17)
 		class = NV17TCL;
-	else if (pNv->NVArch >= 0x11)
+	else if (pNv->dev->chipset >= 0x11)
 		class = NV11TCL;
 	else
 		class = NV10TCL;
diff --git a/src/nv30_exa.c b/src/nv30_exa.c
index a50a6eb..4c1d56d 100644
--- a/src/nv30_exa.c
+++ b/src/nv30_exa.c
@@ -679,7 +679,7 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn)
 #define NV35TCL_CHIPSET_3X_MASK 0x000001e0
 #define NV34TCL_CHIPSET_3X_MASK 0x00000010
 
-	chipset = pNv->NVArch;
+	chipset = pNv->dev->chipset;
 	if ((chipset & 0xf0) != NV_ARCH_30)
 		return TRUE;
 	chipset &= 0xf;
diff --git a/src/nv30_xv_tex.c b/src/nv30_xv_tex.c
index 1ecc7b7..ae28f91 100644
--- a/src/nv30_xv_tex.c
+++ b/src/nv30_xv_tex.c
@@ -303,7 +303,7 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
 		return BadImplementation;
 	}
 
-	if (pNv->NVArch == 0x30) {
+	if (pNv->dev->chipset == 0x30) {
 		int x = 0;
 		int y = 0;
 		int w = ppix->drawable.x + ppix->drawable.width;
@@ -395,7 +395,7 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
 	BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
 	OUT_RING  (chan, NV34TCL_VERTEX_BEGIN_END_STOP);
 
-	if (pNv->NVArch == 0x30) {
+	if (pNv->dev->chipset == 0x30) {
 		BEGIN_RING(chan, rankine, NV34TCL_VIEWPORT_HORIZ, 2);
 		OUT_RING  (chan, 4096 << 16);
 		OUT_RING  (chan, 4096 << 16);
diff --git a/src/nv40_exa.c b/src/nv40_exa.c
index 2b36f2d..9b0d2c7 100644
--- a/src/nv40_exa.c
+++ b/src/nv40_exa.c
@@ -612,8 +612,8 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn)
 	if (!nv40_fp_map_a8[0])
 		NV40EXAHackupA8Shaders(pScrn);
 
-	chipset = pNv->NVArch;
-	if ( (chipset & 0xf0) == NV_ARCH_40) {
+	chipset = pNv->dev->chipset;
+	if ((chipset & 0xf0) == NV_ARCH_40) {
 		chipset &= 0xf;
 		if (NV40TCL_CHIPSET_4X_MASK & (1<<chipset))
 			class = NV40TCL;
diff --git a/src/nv50_accel.c b/src/nv50_accel.c
index 3449d4d..5fa539c 100644
--- a/src/nv50_accel.c
+++ b/src/nv50_accel.c
@@ -32,7 +32,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
 	unsigned class;
 	int i;
 
-	switch (pNv->NVArch & 0xf0) {
+	switch (pNv->dev->chipset & 0xf0) {
 	case 0x50:
 		class = NV50TCL;
 		break;
@@ -41,7 +41,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
 		class = NV84TCL;
 		break;
 	case 0xa0:
-		switch (pNv->NVArch) {
+		switch (pNv->dev->chipset) {
 		case 0xa0:
 		case 0xaa:
 		case 0xac:
diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c
index 4ddb89e..7e2a153 100644
--- a/src/nv_accel_common.c
+++ b/src/nv_accel_common.c
@@ -261,7 +261,7 @@ NVAccelInitImageBlit(ScrnInfoPtr pScrn)
 	struct nouveau_grobj *blit;
 	uint32_t class;
 
-	class = (pNv->NVArch > 0x11) ? NV12_IMAGE_BLIT : NV04_IMAGE_BLIT;
+	class = (pNv->dev->chipset > 0x11) ? NV12_IMAGE_BLIT : NV04_IMAGE_BLIT;
 
 	if (!pNv->NvImageBlit) {
 		if (nouveau_grobj_alloc(chan, NvImageBlit, class,
diff --git a/src/nv_driver.c b/src/nv_driver.c
index f31298b..3eed25a 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -625,6 +625,7 @@ NVPreInitDRM(ScrnInfoPtr pScrn)
 Bool
 NVPreInit(ScrnInfoPtr pScrn, int flags)
 {
+	struct nouveau_device *dev;
 	NVPtr pNv;
 	MessageType from;
 	int ret, i;
@@ -678,47 +679,42 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
 	pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index);
 	pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo);
 
-	volatile uint32_t *regs = NULL;
-	pci_device_map_range(pNv->PciInfo, pNv->PciInfo->regions[0].base_addr,
-			     0x90000, 0, (void *)&regs);
-	pNv->NVArch = NVGetArchitecture(regs);
-	pci_device_unmap_range(pNv->PciInfo, (void *) regs, 0x90000);
+	/* Initialise the kernel module */
+	if (!NVPreInitDRM(pScrn))
+		NVPreInitFail("\n");
+	dev = pNv->dev;
 
 	pScrn->chipset = malloc(sizeof(char) * 25);
-	sprintf(pScrn->chipset, "NVIDIA NV%02X", pNv->NVArch);
-
-	if(!pScrn->chipset) {
-		pScrn->chipset = "Unknown NVIDIA";
-	}
-
+	sprintf(pScrn->chipset, "NVIDIA NV%02x", dev->chipset);
 	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Chipset: \"%s\"\n", pScrn->chipset);
 
-	/* The highest architecture currently supported is NV5x */
-	if (pNv->NVArch >= 0x80) {
-		pNv->Architecture =  NV_ARCH_50;
-	} else if (pNv->NVArch >= 0x60) {
-		pNv->Architecture =  NV_ARCH_40;
-	} else if (pNv->NVArch >= 0x50) {
-		pNv->Architecture =  NV_ARCH_50;
-	} else if (pNv->NVArch >= 0x40) {
-		pNv->Architecture =  NV_ARCH_40;
-	} else if (pNv->NVArch >= 0x30) {
-		pNv->Architecture = NV_ARCH_30;
-	} else if (pNv->NVArch >= 0x20) {
-		pNv->Architecture = NV_ARCH_20;
-	} else if (pNv->NVArch >= 0x10) {
-		pNv->Architecture = NV_ARCH_10;
-	} else if (pNv->NVArch >= 0x04) {
+	switch (dev->chipset & 0xf0) {
+	case 0x00:
 		pNv->Architecture = NV_ARCH_04;
-	/*  The lowest architecture currently supported is NV04 */
-	} else {
+		break;
+	case 0x10:
+		pNv->Architecture = NV_ARCH_10;
+		break;
+	case 0x20:
+		pNv->Architecture = NV_ARCH_20;
+		break;
+	case 0x30:
+		pNv->Architecture = NV_ARCH_30;
+		break;
+	case 0x40:
+	case 0x60:
+		pNv->Architecture = NV_ARCH_40;
+		break;
+	case 0x50:
+	case 0x80:
+	case 0x90:
+	case 0xa0:
+		pNv->Architecture = NV_ARCH_50;
+		break;
+	default:
 		return FALSE;
 	}
 
-	/* Initialise the kernel module */
-	if (!NVPreInitDRM(pScrn))
-		NVPreInitFail("\n");
-
 	/* Set pScrn->monitor */
 	pScrn->monitor = pScrn->confScreen->monitor;
 
diff --git a/src/nv_type.h b/src/nv_type.h
index a30c1ee..e5a4e86 100644
--- a/src/nv_type.h
+++ b/src/nv_type.h
@@ -12,6 +12,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 #include "nouveau_drm.h"
+#include "nouveau_device.h"
 #include "xf86Crtc.h"
 #else
 #error "This driver requires a DRI-enabled X server"
@@ -31,7 +32,6 @@ typedef struct _NVRec {
     uint32_t              Architecture;
     EntityInfoPtr       pEnt;
 	struct pci_device *PciInfo;
-    int                 NVArch;
     Bool                Primary;
 
     /* Various pinned memory regions */
@@ -231,7 +231,7 @@ static inline uint32_t
 
 static inline int nv_cursor_width(NVPtr pNv)
 {
-	return pNv->NVArch >= 0x10 ? NV10_CURSOR_SIZE : NV04_CURSOR_SIZE;
+	return pNv->dev->chipset >= 0x10 ? NV10_CURSOR_SIZE : NV04_CURSOR_SIZE;
 }
 
 static inline int nv_cursor_pixels(NVPtr pNv)