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authorChris Wilson <chris@chris-wilson.co.uk>2011-04-12 08:23:04 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2011-04-12 09:03:01 +0100
commit686018f283f1d131073ef5917213e6a8ac013f26 (patch)
tree20f4f3a67abba6bebf15f05887e0734da478e4fc /src/intel_driver.c
parent3d2b79098ccb3fed86be66f619f4ed338741d454 (diff)
Turn relaxed-fencing off by default for older (pre-G33) chipsets
There are still too many unresolved bugs, typically GPU hangs, that are related to using relaxed fencing (i.e. only allocating the minimal amount of memory required for a buffer) on older hardware, so turn off the feature by default for the release. Reported-and-tested-by: Knut Petersen <Knut_Petersen@t-online.de> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36147 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'src/intel_driver.c')
-rw-r--r--src/intel_driver.c36
1 files changed, 30 insertions, 6 deletions
diff --git a/src/intel_driver.c b/src/intel_driver.c
index 1b0d7404..e867351b 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -101,6 +101,7 @@ typedef enum {
OPTION_DEBUG_FLUSH_CACHES,
OPTION_DEBUG_WAIT,
OPTION_HOTPLUG,
+ OPTION_RELAXED_FENCING,
} I830Opts;
static OptionInfoRec I830Options[] = {
@@ -121,6 +122,7 @@ static OptionInfoRec I830Options[] = {
{OPTION_DEBUG_FLUSH_CACHES, "DebugFlushCaches", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_DEBUG_WAIT, "DebugWait", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_HOTPLUG, "HotPlug", OPTV_BOOLEAN, {0}, TRUE},
+ {OPTION_RELAXED_FENCING, "RelaxedFencing", OPTV_BOOLEAN, {0}, TRUE},
{-1, NULL, OPTV_NONE, {0}, FALSE}
};
/* *INDENT-ON* */
@@ -448,23 +450,33 @@ static void I830XvInit(ScrnInfoPtr scrn)
intel->colorKey);
}
-static Bool has_kernel_flush(struct intel_screen_private *intel)
+static Bool drm_has_boolean_param(struct intel_screen_private *intel,
+ int param)
{
drm_i915_getparam_t gp;
int value;
- /* The BLT ring was introduced at the same time as the
- * automatic flush for the busy-ioctl.
- */
-
gp.value = &value;
- gp.param = I915_PARAM_HAS_BLT;
+ gp.param = param;
if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp))
return FALSE;
return value;
}
+static Bool has_kernel_flush(struct intel_screen_private *intel)
+{
+ /* The BLT ring was introduced at the same time as the
+ * automatic flush for the busy-ioctl.
+ */
+ return drm_has_boolean_param(intel, I915_PARAM_HAS_BLT);
+}
+
+static Bool has_relaxed_fencing(struct intel_screen_private *intel)
+{
+ return drm_has_boolean_param(intel, I915_PARAM_HAS_RELAXED_FENCING);
+}
+
static Bool can_accelerate_blt(struct intel_screen_private *intel)
{
if (0 && (IS_I830(intel) || IS_845G(intel))) {
@@ -630,6 +642,18 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
" 2D GPU acceleration disabled.\n");
}
+ intel->has_relaxed_fencing =
+ xf86ReturnOptValBool(intel->Options,
+ OPTION_RELAXED_FENCING,
+ INTEL_INFO(intel)->gen >= 33);
+ /* And override the user if there is no kernel support */
+ if (intel->has_relaxed_fencing)
+ intel->has_relaxed_fencing = has_relaxed_fencing(intel);
+
+ xf86DrvMsg(scrn->scrnIndex, X_CONFIG,
+ "Relaxed fencing %s\n",
+ intel->has_relaxed_fencing ? "enabled" : "disabled");
+
/* SwapBuffers delays to avoid tearing */
intel->swapbuffers_wait = xf86ReturnOptValBool(intel->Options,
OPTION_SWAPBUFFERS_WAIT,